Pascal and Francis Bibliographic Databases

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Results 1 to 25 of 1683

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Phase locking of high-power microwave oscillatorsWOO, W; BENFORD, J; FITTINGHOFF, D et al.Journal of applied physics. 1989, Vol 65, Num 2, pp 861-866, issn 0021-8979Article

A 10μs fast switching PLL synthesizer for a GSM/EDGE base-stationKEAVENEY, Mike; WALSH, Patrick; TUTHILL, Mike et al.IEEE International Solid-State Circuits Conference. 2004, pp 192-193, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Theorie des PLL mit Rechteckcharakteristik das Phaseudetektors und PI-Zegelfilter. I = Theory of the PLL with rectangular phase detector characteristic and with PI control filter. IHOFFMANN, M. H. W.Frequenz. 1989, Vol 43, Num 6, pp 167-171, issn 0016-1136, 5 p.Article

A novel phase-lock loop acquisition performance measureHASAN, P.AEU. Archiv für Elektronik und Übertragungstechnik. 1986, Vol 40, Num 6, pp 405-407, issn 0001-1096Article

Chaos from phase-locked loops. II: High-dissipation caseENDO, T; CHUA, L. O; NARITA, T et al.IEEE transactions on circuits and systems. 1989, Vol 36, Num 2, pp 255-263, issn 0098-4094, 9 p.Article

Acquisition problem of class of second-order digital phase-locked loopsSARKAR, B. C; CHATTOPADHYAY, S.Electronics Letters. 1989, Vol 25, Num 8, pp 552-553, issn 0013-5194, 2 p.Article

General method for phase-locked loop filter analysis and designCARLOSENA, A; MANUEL-LAZARO, A.IET circuits, devices & systems (Print). 2008, Vol 2, Num 2, pp 249-256, issn 1751-858X, 8 p.Article

Self-correcting clock recovery circuit with improved jitter performanceSHIN, D; PARK, M; LEE, M et al.Electronics Letters. 1987, Vol 23, Num 3, pp 110-111, issn 0013-5194Article

A phase-locked loop for driving vibrating tube densimetersWOOD, R. H; BUZZARD, C. W; MAJER, V et al.Review of scientific instruments. 1989, Vol 60, Num 3, pp 493-494, issn 0034-6748Article

Digital phase-locked loop with jitter boundedWALTERS, S. M; TROUDET, T.IEEE transactions on circuits and systems. 1989, Vol 36, Num 7, pp 980-987, issn 0098-4094, 8 p.Article

Loop gain compensation in phase-locked loopsYEAGER, R.RCA review. 1986, Vol 47, Num 1, pp 78-87, issn 0033-6831Article

A fully integrated 13GHz ΔΣ fractional-N PLL in 0.13μm CMOSTIEBOUT, Marc; SANDNER, Christoph; WOHLMUTH, Hans-Dieter et al.IEEE International Solid-State Circuits Conference. 2004, pp 386-387, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Modeling of chaotic characteristics in integrated phase-locked loopSIU, W. K; WONG, H; CHEUNG, T. S et al.International conference on microelectronic. 1997, pp 751-754, isbn 0-7803-3664-X, 2VolConference Paper

Secure random number generation using chaotic circuitsBERNSTEIN, G. M; LIEBERMAN, M. A.IEEE transactions on circuits and systems. 1990, Vol 37, Num 9, pp 1157-1164, issn 0098-4094, 8 p.Article

Dynamic clamp for pull-in time reductionCALLEJA, H.IEEE transactions on instrumentation and measurement. 1996, Vol 45, Num 5, pp 907-909, issn 0018-9456Article

Multiple cochannel interference effects in a first-order phase-locked loopHASAN, P.European transactions on telecommunications and related technologies. 1994, Vol 5, Num 3, pp 319-326, issn 1120-3862Article

New algorithms for hyperbolic radionavigationFISHER, A. J.IEE proceedings. Part F. Radar and signal processing. 1993, Vol 140, Num 2, pp 145-152, issn 0956-375XArticle

Locking response in coupled phase systemsKOZLOV, A. K.Radiophysics and quantum electronics. 1993, Vol 36, Num 8, pp 552-554, issn 0033-8443Article

The dynamics of a delayed phase-locked loop systemEFREMOV, I. A; UDALOV, N. N.Telecommunications & radio engineering. 1990, Vol 45, Num 3, pp 114-116, issn 0040-2508Article

A phase locked motor speed control system with a sample-and-hold phase detectorLAOPOULOS, T. L; KARYBAKAS, C. A.IEEE transactions on industrial electronics (1982). 1988, Vol 35, Num 2, pp 245-252, issn 0278-0046Article

A new pattern jitter free frequency error detectorALBERTY, T; HESPLET, V.IEEE transactions on communications. 1988, Vol 37, Num 2, pp 159-163, issn 0090-6778Article

An integral measure of the phase noise power in phase locked loopsARTIUCH, R.AEU. Archiv für Elektronik und Übertragungstechnik. 1987, Vol 41, Num 5, pp 289-293, issn 0001-1096Article

Second-order PLL loop filters with independent adjustment of ωn and ζDEKKER, A. P.Electronics Letters. 1986, Vol 22, Num 22, pp 1196-1197, issn 0013-5194Article

Theory of the non-linear analog phase locked loopMargaris, Nikolaos I.Lecture notes in control and information sciences. 2004, issn 0170-8643, isbn 3-540-21339-2, XV, 285 p, isbn 3-540-21339-2Book

A 160-2550MHz CMOS active clock deskewing PLL using analog phase interpolationMAXIM, Adrian.IEEE International Solid-State Circuits Conference. 2004, pp 346-347, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

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