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IC mixed-signal BIST: Separating facts from fictionSUNTER, Stephen K.Proceedings - International Test Conference. 2002, issn 1089-3539, isbn 0-7803-7542-4, p. 1205Conference Paper

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Optimal Self-Testing Embedded parity checkersNIKOLOS, D.IEEE transactions on computers. 1998, Vol 47, Num 3, pp 313-321, issn 0018-9340Article

Smart weapon BIT and reprogramming: A management updatePREISS, Stephen A; LO GUDICE, James T.sans titre. 2002, pp 164-173, isbn 0-7803-7441-X, 10 p.Conference Paper

Date '98 reflects changes in design and test philosophiesFLETCHER, P.Electronic design. 1998, Vol 46, Num 4, pp 111-114, issn 0013-4872, 4 p.Article

Ansi mezzanine modules facilitate flexible reconfigurationHARRISON, Fred.Autotestcon 2004. 2004, pp 321-324, isbn 0-7803-8449-0, 1Vol, 4 p.Conference Paper

FST : A good investmentVOIGT, Karl A.Autotestcon 2004. 2004, pp 540-545, isbn 0-7803-8449-0, 1Vol, 6 p.Conference Paper

Achievement of higher testability goals through the modification of shift registers in LFSR-based testingAHMAD, A.International journal of electronics. 1997, Vol 82, Num 3, pp 249-260, issn 0020-7217Article

IVI drivers : New requirements for IVI conformanceHULETT, Jeff.Autotestcon 2004. 2004, pp 181-184, isbn 0-7803-8449-0, 1Vol, 4 p.Conference Paper

Increasing the testability of object-oriented frameworks with built-in testsTAEWOONG JEON; SUNGYOUNG LEE; HYONWOO SEUNG et al.Lecture notes in computer science. 2002, pp 169-182, issn 0302-9743, isbn 3-540-43968-4, 14 p.Conference Paper

Via wearout detection with on-chip monitorsAHMED, Fahad; MILOR, Linda.Microelectronics journal. 2010, Vol 41, Num 11, pp 789-800, issn 0959-8324, 12 p.Conference Paper

Input match and load tank digital calibration of an inductively degenerated CMOS LNAWILSON, James; ISMAIL, Mohammed.Integration (Amsterdam). 2009, Vol 42, Num 1, pp 3-9, issn 0167-9260, 7 p.Article

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A counter-based pseudo-exhaustive pattern generator for BIST applicationsVOYIATZIS, I.Microelectronics journal. 2004, Vol 35, Num 11, pp 927-935, issn 0959-8324, 9 p.Article

Analog BIST Functionality for Microhotplate Temperature SensorsAFRIDI, Muhammad; MONTGOMERY, Christopher B; COOPER-BALIS, Elliott et al.IEEE electron device letters. 2009, Vol 30, Num 9, pp 928-930, issn 0741-3106, 3 p.Article

On the design of low power BIST for multipliers with Booth encoding and Wallace tree summationBAKALIS, Dimitris; KALLIGEROS, Emmanouil; NIKOLOS, Dimitris et al.Journal of systems architecture. 2002, Vol 48, Num 4-5, pp 125-135, issn 1383-7621, 11 p.Article

Test Patterns of Multiple SIC Vectors: Theory and Application in BIST SchemesFENG LIANG; LUWEN ZHANG; SHAOCHONG LEI et al.IEEE transactions on very large scale integration (VLSI) systems. 2013, Vol 21, Num 4, pp 614-623, issn 1063-8210, 10 p.Article

Design for Testability That Reduces Linearity Testing Time of SAR ADCs : Analog CIrcuits and Related SoC Integration TechnologiesOGAWA, Tomohiko; KOBAYASHI, Haruo; UEMORI, Satoshi et al.IEICE transactions on electronics. 2011, Vol 94, Num 6, pp 1061-1064, issn 0916-8524, 4 p.Article

A new scheme of test data compression based on equal-run-length coding (ERLC)WENFA ZHAN; EL-MALEH, Aiman.Integration (Amsterdam). 2012, Vol 45, Num 1, pp 91-98, issn 0167-9260, 8 p.Article

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