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SCALING LIMITATIONS OF MONOLITHIC POLYCRYSTALLINE-SILICON RESISTORS IN VLSI STATIC RAM'S AND LOGICCHAU CHUN LU N; GERZBERG L; MEINDL JD et al.1982; IEEE TRANS. ELECTRON DEVICES; ISSN 0018-9383; USA; DA. 1982; VOL. 29; NO 4; PP. 682-690; BIBL. 36 REF.Article

Current transport across a grain boundary in polycrystalline semiconductorsCHIH-YUAN LU; CHAU-CHUN LU, N.Solid-state electronics. 1983, Vol 26, Num 6, pp 549-557, issn 0038-1101Article

Half-VDD bit-line sensing scheme in CMOS DARM'sCHAU-CHUN LU, N; CHAO, H. H.IEEE journal of solid-state circuits. 1984, Vol 19, Num 4, pp 451-454, issn 0018-9200Article

MODELING AND OPTIMIZATION OF MONOLITHIC POLYCRYSTALLINE SILICON RESISTORSCHAU CHUN LU N; GERZBERG L; CHIH YUAN LU et al.1981; IEEE TRANS. ELECTRON DEVICES; ISSN 0018-9383; USA; DA. 1981; VOL. 28; NO 7; PP. 818-830; BIBL. 40 REF.Article

A NEW CONDUCTION MODEL FOR POLYCRYSTALLINE SILICON FILMSCHAU CHUN LU N; GERZBERG L; CHIH YUAN LU et al.1981; ELECTRON DEVICE LETT.; ISSN 0193-8576; USA; DA. 1981; VOL. 2; NO 4; PP. 95-98; BIBL. 18 REF.Article

Resistance switching characteristics in polycrystalline silicon film resistorsCHIH-YUAN LU; CHAU-CHUN LU, N; CHIH-CHING SHIH et al.Journal of the Electrochemical Society. 1985, Vol 132, Num 5, pp 1193-1196, issn 0013-4651Article

Effects of grain-boundary trapping-state energy distribution on the activation energy of resistivity of polycrystalline-silicon filmsCHIH-YUAN LU; CHAU-CHUN LU, N; CHI-SHUN WANG et al.Solid-state electronics. 1984, Vol 27, Num 5, pp 463-466, issn 0038-1101Article

A conduction model for semiconductor-grain-boundary-semiconductor barriers in polycrystalline-silicon filmsCHAU-CHUN LU, N; GERZBERG, L; CHIH-YUAN LU et al.I.E.E.E. transactions on electron devices. 1983, Vol 30, Num 2, pp 137-149, issn 0018-9383Article

A substrate-plate trench-capacitor (SPT) memory cell for dynamic RAM'sCHAU-CHUN LU, N; COTTRELL, P. E; SCHEUERLEIN, R. E et al.IEEE journal of solid-state circuits. 1986, Vol 21, Num 5, pp 627-634, issn 0018-9200Article

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