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UNE MACHINE A TESTER LES SYSTEMES SEQUENTIELS PAR DES SEQUENCES PSEUDO-ALEATOIRESTELLEZ GIRON R.sdIN: CONCEPT. MAINT. AUTOM. LOGIQUES. COLLOQ. INT. TOULOUSE, 1972, PRETIRAGES; TOULOUSE; CNRS; DA. S.D.; PP. (10 P.); BIBL. 3 REF.Conference Paper

UNE APPROCHE A LA DETECTION EN LIGNE DES PANNES DANS LES SYSTEMES SEQUENTIELS SYNCHRONESDIAZ M; COURVOISIER M; RICHARD JP et al.sdIN: CONCEPT. MAINT. AUTOM. LOGIQUES. COLLOQ. INT. TOULOUSE, 1972, PRETIRAGES; TOULOUSE; CNRS; DA. S.D.; PP. (9 P.); BIBL. 6 REF.Conference Paper

DOUBLE-EDGE-TRIGGERED FLIP-FLOPSUNGER SH.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 6; PP. 447-452; BIBL. 6 REF.Article

NEGATIVE FAILSAFE SEQUENTIAL CIRCUITSGAITANIS N; HALATSIS C.1980; ELECTRON. LETTERS; GBR; DA. 1980; VOL. 16; NO 16; PP. 615-617; BIBL. 8 REF.Article

TEPES - UN SYSTEME DE PRODUCTION DE PROGRAMMES POUR L'ESSAI DES CIRCUITS NUMERIQUES.MATTHIAS E; MERZ G.1976; REV. TELECOMMUNIC.; FR.; DA. 1976; VOL. 51; NO 1; PP. 55-61; BIBL. 3 REF.Article

DECOMPOSITION OF LINEAR SEQUENTIAL CIRCUITS OVER RESIDUE CLASS RINGSMATLUK MM; GILL A.1972; J. FRANKLIN INST.; U.S.A.; DA. 1972; VOL. 294; NO 3; PP. 167-180; BIBL. 5 REF.Serial Issue

SEQUENTIELLER DIGITALWERTKOMPARATOR = COMPARATEUR NUMERIQUE SEQUENTIELSTEINHAGEN H.1979; RADIO FERNSCHEN ELEKTRON.; DDR; DA. 1979; VOL. 28; NO 5; PP. 299-300; BIBL. 9 REF.Article

MATRIX METHOD FOR SYSTEMATISING SEQUENTIAL-CIRCUIT DESIGN.PAGE EW.1976; ELECTRON. LETTERS; G.B.; DA. 1976; VOL. 12; NO 2; PP. 49-50; BIBL. 3 REF.Article

COMMENTS ON "SYNTHESIS OF MULTIPLE-INPUT CHANGE ASYNCHRONOUS MACHINES USING CONTROLLED EXCITATION AND FLIP-FLOPS".BREDESON J; CHUANG HYH; SANTANU DAS et al.1975; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1975; VOL. 24; NO 11; PP. 1142-1144Article

ALGEBRAIC ANALYSIS FOR ASYNCHRONOUS SEQUENTIAL CIRCUITS.NAITO S.1974; N.E.C. RES. DEVELOP.; JAP.; DA. 1974; NO 34; PP. 80-89; BIBL. 4 REF.Article

APPLICATION DES CIRCUITS SEQUENTIELS DE DECISION DANS LES APPAREILS D'ENSEIGNEMENT ET DE CONTROLE DES CONNAISSANCESSVIRIDOV AP; DERGUNOV MN; BOEV BN et al.1972; TRUDY MOSKOV. ENERGET. INST.; S.S.S.R.; DA. 1972; NO 135; PP. 48-57; BIBL. 6 REF.Serial Issue

MODELS OF ASYNCHRONOUS SEQUENTIAL CIRCUITSYAKUBATIS EA; GOBZEMIS AJ; PETRENKO AF et al.sdIN: CONCEPT. MAINT. AUTOM. LOGIQUES. COLLOQ. INT. TOULOUSE, 1972, PRETIRAGES; TOULOUSE; CNRS; DA. S.D.; PP. (11 P.); BIBL. 10 REF.Conference Paper

VERSATILE SEQUENCE CONTROLLER.TAN JSC.1975; PROC. I.R.E.E.; AUSTRAL.; DA. 1975; VOL. 36; NO 7; PP. 232-234; BIBL. 1 REF.Article

RELAIS A LAME SOUPLE POUR CIRCUITS DE COMMUTATIONWIERZBA HJ.1975; ZESZ. NAUK POLITECH. GDANSK., ELEKTRON.; POLSKA; DA. 1975; NO 36; PP. 103-124; ABS. ANGL. RUSSE; BIBL. 1 P. 1/2Article

COMMENTS ON "MONOTONE FUNCTIONS IN SEQUENTIAL CIRCUITS".IBARAKI T.1974; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1974; VOL. 23; NO 9; PP. 989-990; BIBL. 3 REF.Article

N-FAIL-SAFE SEQUENTIAL MACHINESTAKAOKA T; IBARAKI T.1972; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1972; VOL. 21; NO 11; PP. 1189-1196; BIBL. 12 REF.Serial Issue

COMPTEURS AVEC FACTEUR DE DEMULTIPLICATION CONTROLABLESHNYREV EF; MAMIS AF.1982; PRIB. TEH. EKSP.; ISSN 0032-8162; SUN; DA. 1982; NO 3; PP. 81-83; BIBL. 3 REF.Article

STORED STATE ASYNCHRONOUS SEQUENTIAL CIRCUITSHAYES AB.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 8; PP. 596-600; BIBL. 16 REF.Article

GENERAL EXCITATION TABLE FOR A JK MULTISTABLE.ACHA JI; HUERTAS JL.1975; ELECTRON. LETTERS; G.B.; DA. 1975; VOL. 11; NO 25-26; PP. 624; BIBL. 8 REF.Article

BERECHNUNG DER AUSGANGSSIGNALE SEQUENTIELLER SCHALTUNGEN DER VERMITTLUNGSTECHNIK UNTER BERUECKSICHTIGUNG PRUEFTECHNOLOGISCHER ASPEKTE. = CALCUL DU SIGNAL DE SORTIE DE CIRCUITS SEQUENTIELS DE COMMUTATION, COMPTE TENU DE LA TECHNOLOGIE DE CONTROLEKRAFT RJ.1975; FERNMELDETECHNIK; DTSCH.; DA. 1975; VOL. 15; NO 4; PP. 124-125; ABS. RUSSE ANGL. FR. ESP.; BIBL. 4 REF.Article

COMMENT CONCEVOIR DES CARTES LOGIQUES POUR EN FACILITER LE TEST AUTOMATIQUE ET LE DEPANNAGE.LE GORGEU M.1975; ELECTRON. MICROELECTRON. INDUSTR.; FR.; DA. 1975; NO 206; PP. 19-23Article

POWER MINIMIZATION PROBLEMS OF LOGIC NETWORKS. = PROBLEMES DE MINIMISATION DE PUISSANCE POUR LES RESEAUX LOGIQUESYAJIMA S; INAGAKI K.1974; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1974; VOL. 23; NO 2; PP. 153-165; BIBL. 17 REF.Article

A FAULT-COLLAPSING ANALYSIS IN SEQUENTIAL LOGIC NETWORKSCHANG SJ; BREUER MA.1981; BELL SYST. TECH. J.; ISSN 0005-8580; USA; DA. 1981; VOL. 60; NO 9; PP. 2259-2271; BIBL. 5 REF.Article

AUTOMATISMES SEQUENTIELS: LA SYNTHESE PAR LE GRAFCETBROCHET P; LOPEZ P.1980; AUTOMAT. INFORMAT. INDUSTR.; FRA; DA. 1980; NO 83; PP. 19-27; BIBL. 14 REF.Article

EFFICIENCY OF COMPACT TESTING FOR SEQUENTIAL CIRCUITS.LOSQ J.1977; IN: FTCS-7. ANNU. INT. CONF. FAULT-TOLERANT COMPUT. 7; LOS ANGELES; 1977; NEW YORK; INST. ELECTR. ELECTRON. ENG.; DA. 1977; PP. 168-174; BIBL. 23 REF.Conference Paper

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