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A SIMPLIFIED FULLY IMPLANTED BIPOLAR VLSI TECHNOLOGYKO WC; GWO TC; YEUNG PH et al.1983; IEEE TRANSACTIONS ON ELECTRON DEVICES; ISSN 0018-9383; USA; DA. 1983; VOL. 30; NO 3; PP. 236-239; BIBL. 13 REF.Article

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INTERCONNECTION DELAYS IN MOSFET VLSIELMASRY MI.1981; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1981; VOL. 16; NO 5; PP. 585-591; BIBL. 8 REF.Article

A 32-BIT VLSI CPU CHIPBEYERS JW; DOHSE LJ; FUCETOLA JP et al.1981; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1981; VOL. 16; NO 5; PP. 537-542; BIBL. 3 REF.Article

THE CHALLENGE OF THE VLSI TECHNIQUE TO TELECOMMUNICATIONS SYSTEMSGOSER KF.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 406-410; BIBL. 31 REF.Article

A 1-MU M BIPOLAR VLSI TECHNOLOGYEVANS SA; MORRIS SA; ARLEDGE LA JR et al.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 438-444; BIBL. 11 REF.Article

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MANAGING VLSI COMPLEXITY: AN OUTLOOKSEQUIN CH.1983; PROCEEDINGS OF THE IEEE; ISSN 0018-9219; USA; DA. 1983; VOL. 71; NO 1; PP. 149-166; BIBL. 87 REF.Article

A TRANSMISSION LINE MODEL OF A VLSI PACKAGEREED DJ; SHEALY DL.1983; SOLID STATE TECHNOLOGY; ISSN 0038-111X; USA; DA. 1983; VOL. 26; NO 2; PP. 127-131; BIBL. 5 REF.Article

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IN SITU TESTABILITY DESIGN(ISTD) - A NEW APPROACH FOR TESTING HIGH-SPEED LSI/VLSI LOGICTSUI FF.1982; PROC. IEEE; ISSN 0018-9219; USA; DA. 1982; VOL. 70; NO 1; PP. 59-78; BIBL. 8 REF.Article

LES PERSPECTIVES DANS LE DOMAINE DU TEST ET DE LA TESTABILITE DES CIRCUITS A TRES HAUTE INTEGRATIONSAUCIER G.1982; ONDE ELECTRIQUE; ISSN 0030-2430; FRA; DA. 1982; VOL. 62; NO 3; PP. 76-87; ABS. ENG; BIBL. 36 REF.Article

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SURFACE CONDUCTION IN SHORT-CHANNEL MOS DEVICES AS A LIMITATION TO VLSI SCALINGEITAN B; FROHMAN BENTCHKOWSKY D.1982; IEEE TRANS. ELECTRON DEVICES; ISSN 0018-9383; USA; DA. 1982; VOL. 29; NO 2; PP. 254-266; BIBL. 29 REF.Article

NONPLANAR VLSI DEVICE ANALYSIS USING THE SOLUTION OF POISSON'S EQUATIONGREENFIELD JA; DUTTON RW.1980; IEEE TRANS. ELECTRON. DEVICES; ISSN 0018-9383; USA; DA. 1980; VOL. 27; NO 8; PP. 1520-1532; BIBL. 30 REF.Article

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ASYNCHRONOUS AND CLOCKED CONTROL STRUCTURES FOR VSLI BASED INTERCONNECTION NETWORKSWANN DF; FRANKLIN MA.1983; IEEE TRANSACTIONS ON COMPUTERS; ISSN 0018-9340; USA; DA. 1983; VOL. 32; NO 3; PP. 284-293; BIBL. 32 REF.Article

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A SYNCHRONOUS APPROACH FOR CLOCKING VLSI SYSTEMSANCEAU F.1982; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1982; VOL. 17; NO 1; PP. 51-56; BIBL. 7 REF.Article

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INTERNATIONAL CONFERENCE ON NEW TRENDS IN INTEGRATED CIRCUITS; COLLOQUE INTERNATIONAL SUR LES NOUVELLES ORIENTATIONS DES CIRCUITS INTEGRES, PARIS, 7-10 AVRIL 19811981; COLLOQUE INTERNATIONAL SUR LES NOUVELLES ORIENTATIONS DES CIRCUITS INTEGRES/1981-04-07/PARIS; FRA; DIEPPE; PARIS: IMPR. SITECMO; DA. 1981; 257 P.; 30 CMConference Proceedings

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