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Results 1 to 25 of 1664

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A 43Gb/s 2:1 Selector IC in 90nm CMOS technologyYAMAMOTO, Takuji; HORINAKA, Minoru; YAMAZAKI, Daisuke et al.IEEE International Solid-State Circuits Conference. 2004, pp 238-239, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Leakage Power Characterization Considering Process VariationsROSSELLO, Jose L; DE BENITO, Carol; BOTA, Sebastia et al.Lecture notes in computer science. 2006, pp 66-74, issn 0302-9743, isbn 3-540-39094-4, 1Vol, 9 p.Conference Paper

Polycrystalline silicon-germanium films for integrated microsystemsFRANKE, Andrea E; HECK, John M; KING, Tsu-Jae et al.Journal of microelectromechanical systems. 2003, Vol 12, Num 2, pp 160-171, issn 1057-7157, 12 p.Article

Novel low-voltage fully-differential bufferFERRI, Giuseppe; GUERRINI, Nicola; SPERINI, Manolo et al.Proceedings of SPIE - the International Society for Optical Engineering. 2005, isbn 0-8194-5832-5, 2Vol, vol2, 994-1002Conference Paper

A very low power CMOS mixed-signal IC for implantable pacemaker applicationsWONG, Louis S. Y; HOSSAIN, S; UHRENIUS, A et al.IEEE International Solid-State Circuits Conference. 2004, pp 318-319, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Local redesign for reliability of CMOS digital circuits under device degradationXIANGDONG XUAN; CHATTERJEE, Abhijit; SINGH, Adit D et al.IEEE international reliability physics symposium. 2004, pp 651-652, isbn 0-7803-8315-X, 1Vol, 2 p.Conference Paper

Test circuit for CMOS lead open detection by supply current testing under AC electric field applicationHASHIZUME, M; ICHIMIYA, M; YOTSUYANAGI, H et al.MWSCAS : Midwest symposium on circuits and systems. 2004, isbn 0-7803-8346-X, 3Vol, Vol I, 557-560Conference Paper

CMOS RF modeling, characterization and applicationsDEEN, M. Jamal; FJELDLY, Tor A.International journal of high speed electronics and systems. 2001, Vol 11, Num 4, 415 p.Serial Issue

Forecast of CMOS Imagers Yield Learning by the Gompertz ModelORGANTINI, Paolo; RUSSO, Felice.IEEE transactions on semiconductor manufacturing. 2013, Vol 26, Num 3, pp 393-399, issn 0894-6507, 7 p.Article

A Unified Method for Calculating Capacitive and Resistive Coupling Exploiting Geometry Constraints on Lightly and Heavily Doped CMOS ProcessesBONTZIOS, Yiorgos I; HATZOPOULOS, Alkis A.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 8, pp 1751-1760, issn 0018-9383, 10 p.Article

Multimodal Sensor for Simultaneous Proton and Light Sensing Using a Hole and Electron Accumulation TechniqueNAKAZAWA, Hirokazu; WATANABE, Hiroto; ISHIDA, Makoto et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 6, pp 1780-1785, issn 0018-9383, 6 p.Article

Jitter Challenges and Reduction Techniques at 10 Gb/s and Beyond : High-speed I/O channelsMIKE PENG LI.IEEE transactions on advanced packaging. 2009, Vol 32, Num 2, pp 290-297, issn 1521-3323, 8 p.Article

A monotonic digitally controlled delay elementMAYMANDI-NEJAD, Mohammad; SACHDEV, Manoj.IEEE journal of solid-state circuits. 2005, Vol 40, Num 11, pp 2212-2219, issn 0018-9200, 8 p.Article

Polarization-Independent Photodetectors With Enhanced Responsivity in a Standard Silicon-on-Insulator Complementary Metal-Oxide-Semiconductor ProcessMOLL, N; MORF, T; FERTIG, M et al.Journal of lightwave technology. 2009, Vol 27, Num 21-24, pp 4892-4896, issn 0733-8724, 5 p.Article

A new compact model for external latchup : Electrostatic Discharge ReliabilityFARBIZ, Farzan; ROSENBAUM, Elyse.Microelectronics and reliability. 2009, Vol 49, Num 12, pp 1447-1454, issn 0026-2714, 8 p.Conference Paper

A differential current-mode sensing method for high-noise-immunity, single-ended register filesTZARTZANIS, Nestoras; WALKER, William W.IEEE International Solid-State Circuits Conference. 2004, pp 506-507, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Polysilicon process development for fully integrated surface-micromachined accelerometer with CMOS electronicsKING, D. O; WARD, M. C. L; BRUNSON, K. M et al.Sensors and actuators. A, Physical. 1998, Vol 68, Num 1-3, pp 238-243, issn 0924-4247Conference Paper

Monolithic integration of GaAs devices with completely fabricated Si CMOS circuitsKAI MA; CHEN, Ray; MILLER, David A. B et al.Lasers and Electro-optics Society. 2004, isbn 0-7803-8557-8, 2Vol, Vol1, 230-231Conference Paper

CARACTÉRISATION ET MODÉLISATION DES CAPACITÉS PARASITES DUES AUX INTERCONNEXIONS EN TECHNOLOGIE CMOS FORTEMENT SUBMICRONIQUE = CHARACTERIZATION AND MODELLING OF INTERCONNECT PARASITIC CAPACITANCES IN DEEP SUBMICRONIC CMOS TECHNOLOGYBernard, David; Landrault, Christian.2000, 186 p.Thesis

CMOS sensor systemsHOSTICKA, B. J.Sensors and actuators. A, Physical. 1998, Vol 66, Num 1-3, pp 335-341, issn 0924-4247Conference Paper

Du radar à antennes réparties vers la peau intelligente : architectures de traitement du signal et liaisons optiques = From distributed antennas to intelligent skin : signal processing architectures and optical linksPLOUHINEC, R.REE. Revue de l'électricité et de l'électronique. 1995, Num 3, issn 1265-6534, 7, 67-72 [7 p.]Article

Tuning sensitivity and selectivity of complementary metal oxide semiconductor-based capacitive chemical microsensorsKUMMER, Adrian M; HIERLEMANN, Andreas; BALTES, Henry et al.Analytical chemistry (Washington, DC). 2004, Vol 76, Num 9, pp 2470-2477, issn 0003-2700, 8 p.Article

ESD reliability issues in RF CMOS circuitsRADHAKRISHNAN, M. K; VASSILEV, V; KEPPENS, B et al.SPIE proceedings series. 2002, pp 551-556, isbn 0-8194-4500-2, 2VolConference Paper

CMOS polycrystalline silicon circuits on steel substratesMING WU; WAGNER, Sigurd.Journal of non-crystalline solids. 2002, Vol 299302, pp 1316-1320, issn 0022-3093, bConference Paper

Effects of gate-to-body tunneling current on pass-transistor based PD/SOI CMOS circuitsCHUANG, C. T; PURI, R.IEEE International SOI conference. 2002, pp 121-122, isbn 0-7803-7439-8, 2 p.Conference Paper

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