Implementing Serial Bus Interfaces Using General Purpose Digital InstrumentationJOHNSON, Dale.IEEE instrumentation & measurement magazine. 2010, Vol 13, Num 4, pp 8-13, issn 1094-6969, 6 p.Conference Paper

ETUDE D'ALGORITHMES D'ECHANGE D'INFORMATION DANS CERTAINS TYPES DE RESEAUX A BUS = STUDY OF COMMUNICATION ALGORITHMS IN CERTAIN KINDS OF BUS-CONNECTION NETWORKSHily, Andre; Sotteau, Dominique.1999, 132 p.Thesis

Fieldbus ready to start the last lap? A plant view of fieldbus in useSPEAR, M.Process engineering. 1994, Vol 75, Num 4, pp 37-39, issn 0370-1859Article

Semi-Markov performance model of an extended token bus protocolAKHTAR, S; SOOD, A. K; SRINIVASAN, K. Y et al.International journal of electronics. 1988, Vol 65, Num 5, pp 907-921, issn 0020-7217Article

Graph-based codeword selection for memoryless low-power bus codingGUSTAFSSON, O.Electronics Letters. 2004, Vol 40, Num 24, pp 1531-1532, issn 0013-5194, 2 p.Article

Fortführung der Ex-Feldbus-Untersuchung = Continuation of investigation concerning feldbus in hazardous areasPINKOWSKI, G.Automatisierungstechnische Praxis. 1992, Vol 34, Num 11, pp 617-622, issn 0178-2320Article

Static Pulsed Bus for on-chip interconnectsKHELLAH, Muhammad; TSCHANZ, James; YE, Yibin et al.2002 symposium on VLSI circuits. 2002, pp 78-79, isbn 0-7803-7310-3, 2 p.Conference Paper

Zur Entwicklung und Anwendung eines für die Prozess- und Büroautomatisierung geeigneten lokalen Netzes = Développement et application d'un réseau local convenant à l'automatisation de bureaux et à l'automatisation de processus = Development and application of a local network available to office and processus automationREINIG, G.Wissenschaftliche Zeitschrift der Technischen Universität Dresden. 1988, Vol 37, Num 3, pp 234-237, issn 0043-6925Article

Failure of instruction prefetching of 8088/286/386 microprocessors in XT/AT systemsLUA, K. T.Microprocessing and microprogramming. 1990, Vol 29, Num 2, pp 97-106, issn 0165-6074, 10 p.Article

Remodeling of the Fetal Collecting Duct EpitheliumHIATT, Michael J; IVANOVA, Larissa; TORAN, Nuria et al.The American journal of pathology. 2010, Vol 176, Num 2, pp 630-637, issn 0002-9440, 8 p.Article

A 4Gb/s/pin dual-reference simultaneous bidirectional I/O circuit for memory-bus interfaceKIM, Woo-Seop; CHOI, Jung-Hwan; KIM, Jin-Hyun et al.IEEE International Solid-State Circuits Conference. 2004, pp 412-413, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Performance measurement using low perturbation and high precision hardware assistsMINK, A; SALAMON, W; HOLLINGSWORTH, J. K et al.IEEE real-time systems symposium. 1998, pp 379-388, isbn 0-8186-9212-XConference Paper

A specification methodology by a collection of compact properties as applied to the intel® itanium<^TM> Processor bus protocolSHIMIZU, Kanna; DILL, David L; CHOU, Ching-Tsun et al.Lecture notes in computer science. 2001, pp 340-354, issn 0302-9743, isbn 3-540-42541-1Conference Paper

Bus CAN = CAN busRACHID, Ahmed; COLLET, Frédéric.Techniques de l'ingénieur. Informatique industrielle. 2000, Vol S3, Num S8140, pp S8140.1-S8140.22, issn 1632-3831Article

A high speed serial bus controller ASICKERÖ, N; JANKOVIC, S; FALLMAN, W et al.International conference on microelectronic. 1997, pp 737-740, isbn 0-7803-3664-X, 2VolConference Paper

A reservation protocol for packet voice and data integration in unidirectional bus networksAPOSTOLIDIS, K; MERAKOS, L. F; XIE-HAO XING et al.IEEE transactions on communications. 1993, Vol 41, Num 3, pp 478-485, issn 0090-6778Article

Brake by wire for commercial vehiclesWREDE, J; DECKER, H.SAE transactions. 1992, Vol 101, Num 2, pp 849-859, issn 0096-736XArticle

Architecture d'un commutateur ATM à structure de bus à scrutation d'entrées synchronisée = Architecture for an ATM switch with a Bus structure and synchronised scheduling of inputsFayet, Nicole; Pujolle, Guy.1992, 195 p.Thesis

Analyse und Bewertung des Bitbus für die automatisierte Fertigung = Analysis and evaluation for using the Birbus in automated productionSTURM, L; WERNER, B; ROHRMANN, P et al.Automatisierungstechnische Praxis. 1991, Vol 33, Num 12, pp 617-625, issn 0178-2320Article

Design of a second-level cache chip for shared-bus multimicroprocessor systemsUCHIYAMA, K; AOKI, H; NISHII, O et al.IEEE journal of solid-state circuits. 1991, Vol 26, Num 4, pp 566-571, issn 0018-9200Article

Structures bus de traitement numérique des signaux et leur modélisation sur ordinateurMOVSHOVICH, A. M; YAKOVLEVA, N. K.Radiotehnika (Moskva). 1988, Num 5, pp 27-30, issn 0033-8486Article

I/O bus usage control in PC-based software routersLEPE-ALDAMA, Oscar-Ivan; GARCIA-VIDAL, Jorge.Lecture notes in computer science. 2002, pp 1135-1140, issn 0302-9743, isbn 3-540-43709-6, 6 p.Conference Paper

Ordonnancement dans les réseaux de processeurs : complexité et approximation = Scheduling in multiprocessors interconnection networks : complexity and approximationLahlou, Chams; Chretienne, Philippe.1998, 100 p.Thesis

Collecting duct zones in the kidney of the freshwater teleost Siniperca scherzeri Steindachner (Sinipercinae, Percichthyidae, Perciformes)ZHONG, M.-C.Journal of fish biology. 1991, Vol 38, Num 2, pp 309-311, issn 0022-1112Article

Diagnosis of multiple bus faultsNARRAWAY, J. J.IEE proceedings. Part E. Computers and digital techniques. 1989, Vol 136, Num 1, pp 29-40, issn 0143-7062, 12 p.Article