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Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nmNAJMZADEH, Mohammad; BERTHOME, Matthieu; SALLESE, Jean-Michel et al.Solid-state electronics. 2014, Vol 98, pp 55-62, issn 0038-1101, 8 p.Article

Minimax Robust Relay Selection Based on Uncertain Long-Term CSINISAR, M. Danish; ALOUINI, Mohamed-Slim.IEEE transactions on vehicular technology. 2014, Vol 63, Num 2, pp 975-982, issn 0018-9545, 8 p.Article

Impact of a Spacer―Drain Overlap on the Characteristics of a Silicon Tunnel Field-Effect Transistor Based on Vertical TunnelingMALLIK, Abhijit; CHATTOPADHYAY, Avik; GUIN, Shilpi et al.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 3, pp 935-943, issn 0018-9383, 9 p.Article

Modeling and Design Space of Junctionless Symmetric DG MOSFETs With Long ChannelJAZAERI, Farzan; BARBUT, Lucian; SALLESE, Jean-Michel et al.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 7, pp 2120-2127, issn 0018-9383, 8 p.Article

Probing Long-Range Coulomb Interactions in Nanoscale MOSFETsCHEN, Ming-Jer; CHANG, Li-Ming; WEI, Sih-Yun et al.IEEE electron device letters. 2013, Vol 34, Num 12, pp 1563-1565, issn 0741-3106, 3 p.Article

A Nonpiecewise Model for Long-Channel Junctionless Cylindrical Nanowire FETsDUARTE, Juan P; CHOI, Sung-Jin; MOON, Dong-Il et al.IEEE electron device letters. 2012, Vol 33, Num 2, pp 155-157, issn 0741-3106, 3 p.Article

A Rigorous Classical Solution for the Drain Current of Doped Symmetric Double-Gate MOSFETsORTIZ-CONDE, Adelmo; GARCIA-SANCHEZ, Francisco J.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 9, pp 2390-2395, issn 0018-9383, 6 p.Article

Realization of Unidirectional Planar GaAs Nanowires on GaAs (110) SubstratesDOWDY, Ryan; WALKO, Donald A; FORTUNA, Seth A et al.IEEE electron device letters. 2012, Vol 33, Num 4, pp 522-524, issn 0741-3106, 3 p.Article

A Lambert-Function Charge-Based Methodology for Extracting Electrical Parameters of Nanoscale FinFETsTSORMPATZOGLOU, Andreas; PAPATHANASIOU, Konstantinos; FASARAKIS, Nikolaos et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 12, pp 3299-3305, issn 0018-9383, 7 p.Article

Multiple centimetre-long fluidic-channels with smooth and vertical sidewall fabricated by novel NIL mould and thermal bondingXIAOJUN LI; YONG CHEN; KEQIANG QIU et al.Microelectronic engineering. 2012, Vol 98, pp 720-724, issn 0167-9317, 5 p.Conference Paper

Multisector Eigenbeamforming With MMSE Reception in Spatially Correlated ChannelsYEOM, Jae-Heung; LEE, Yong-Hwan.IEEE transactions on vehicular technology. 2011, Vol 60, Num 2, pp 745-749, issn 0018-9545, 5 p.Article

The effects of channel length and film microstructure on the performance of pentacene transistorsFLEISCHLI, Franziska D; SIDLER, Katrin; SCHAER, Michel et al.Organic electronics (Print). 2011, Vol 12, Num 2, pp 336-340, issn 1566-1199, 5 p.Article

A Computationally Efficient Generalized Poisson Solution for Independent Double-Gate TransistorsSAHOO, Avinash; PANKAJ KUMAR THAKUR; MAHAPATRA, Santanu et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 3, pp 632-636, issn 0018-9383, 5 p.Article

A Vertical 4-Bit SONOS Flash Memory and a Unique 3-D Vertical NOR Array StructureKIM, Yoon; IL HAN PARK; KIM, Wandong et al.IEEE transactions on nanotechnology. 2010, Vol 9, Num 1, pp 70-77, issn 1536-125X, 8 p.Article

A 45 nm 8-Core Enterprise Xeon® ProcessorRUSU, Stefan; TAM, Simon; MULJONO, Harry et al.IEEE journal of solid-state circuits. 2010, Vol 45, Num 1, pp 7-14, issn 0018-9200, 8 p.Conference Paper

An experimental investigation of the surface potential in ferroelectric P(VDF-TrFE) FETsRUSU, Alexandru; SALVATORE, Giovanni; IONESCU, Adrian et al.Microelectronic engineering. 2010, Vol 87, Num 5-8, pp 1607-1609, issn 0167-9317, 3 p.Conference Paper

A compact drain current model of short-channel cylindrical gate-all-around MOSFETsTSORMPATZOGLOU, A; TASSIS, D. H; DIMITRIADIS, C. A et al.Semiconductor science and technology. 2009, Vol 24, Num 7, issn 0268-1242, 075017.1-075017.8Article

A new analytical threshold voltage model for the doped polysilicon thin-film transistorsWEIJING WU; RUOHE YAO; XUEREN ZHENG et al.Solid-state electronics. 2009, Vol 53, Num 6, pp 607-612, issn 0038-1101, 6 p.Article

Drain current improvements in uniaxially strained p-MOSFETs: A Multi-Subband Monte Carlo studyCONZATTI, F; DE MICHIELIS, M; ESSENI, D et al.Solid-state electronics. 2009, Vol 53, Num 7, pp 706-711, issn 0038-1101, 6 p.Conference Paper

Helium Flow and Temperature Distribution in a Heated Dual-Channel CICC Sample for ITERHERZOG, Robert; LEWANDOWSKA, Monika; BAGNASCO, Maurizio et al.IEEE transactions on applied superconductivity. 2009, Vol 19, Num 3, pp 1488-1491, issn 1051-8223, 4 p., 2Conference Paper

A Charge-Based Model for Long-Channel Cylindrical Surrounding-Gate MOSFETs From Intrinsic Channel to Heavily Doped BodyFENG LIU; JIN HE; LINING ZHANG et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 8, pp 2187-2194, issn 0018-9383, 8 p.Article

Carrier-based compact modeling of charge and capacitance of long channel undoped symmetric double-gate MOSFETsJIN HE; WEI BIAN; YU CHEN et al.Semiconductor science and technology. 2008, Vol 23, Num 4, issn 0268-1242, 045003.1-045003.8Article

Investigation of Coulomb Mobility in Nanoscale Strained PMOSFETsCHEN, William Po-Nien; PIN SU; GOTO, Ken-Ichi et al.IEEE transactions on nanotechnology. 2008, Vol 7, Num 5, pp 538-543, issn 1536-125X, 6 p.Article

A Non-Charge-Sheet Analytic Model for Symmetric Double-Gate MOSFETs With Smooth Transition Between Partially and Fully Depleted Operation ModesFENG LIU; JIN HE; JIAN ZHANG et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 12, pp 3494-3502, issn 0018-9383, 9 p.Article

Demonstration of metal-gated low Vt n-MOSFETs using a poly -Si /TaN/Dy2O3/SiON gate stack with a scaled EOT valueYU, H. Y; SINGANAMALLA, R; YIN, K. M et al.IEEE electron device letters. 2007, Vol 28, Num 7, pp 656-658, issn 0741-3106, 3 p.Article

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