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Results 1 to 25 of 887

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Synthesis, physical properties, and field-effect transistors of novel thiophene/thiazolothiazole co-oligomersANDO, Shinji; NISHIDA, Jun-Ichi; INOUE, Youji et al.Journal of material chemistry. 2004, Vol 14, Num 12, pp 1787-1790, issn 0959-9428, 4 p.Article

Lateral extension engineering using nitrogen implantation (N-tub) for high-performance 40-nm pMOSFETsMOMIYAMA, Y; OKABE, K; NAKAO, H et al.IEDm : international electron devices meeting. 2002, pp 647-650, isbn 0-7803-7462-2, 4 p.Conference Paper

A sub-400°C germanium MOSFET technology with high-κ dielectric and metal gateCHI ON CHUI; KIM, Hyoungsub; CHI, David et al.IEDm : international electron devices meeting. 2002, pp 437-440, isbn 0-7803-7462-2, 4 p.Conference Paper

BSIM4.1 DC parameter extraction on 50 nm n-pMOSFETsSOUIL, D; GUEGAN, G; BERTRAND, G et al.2002 international conference on microelectronic test structures. 2002, pp 115-119, isbn 0-7803-7464-9, 5 p.Conference Paper

Analytical study of punchthrough in buried channel P-MOSFET'sSKOTNICKI, T; MERCKEL, G; PEDRON, T et al.I.E.E.E. transactions on electron devices. 1989, Vol 36, Num 4, pp 690-705, issn 0018-9383, 16 p.Article

NBTI mechanism in ultra-thin gate dielectric: Nitrogen-originated mechanism in SiONMITANI, Yuichiro; NAGAMINE, Makoto; SATAKE, Hideki et al.IEDm : international electron devices meeting. 2002, pp 509-512, isbn 0-7803-7462-2, 4 p.Conference Paper

A predictive reliability model for PMOS bias temperature degradationMAHAPATRA, S; ALAM, M. A.IEDm : international electron devices meeting. 2002, pp 505-508, isbn 0-7803-7462-2, 4 p.Conference Paper

Solid phase crystallisation using inline furnace systemKIM, M. J; JIN, G. H; YU, C. H et al.Electronics letters. 2011, Vol 47, Num 17, pp 978-980, issn 0013-5194, 3 p.Article

A physical model for the gate current injection in p-channel MOSFET'sIH-CHIN CHEN; WANG, S. J.IEEE electron device letters. 1993, Vol 14, Num 5, pp 228-230, issn 0741-3106Article

Short-channel pMOST's in a high-resistivity silicon substrate. II: Noise performanceVANSTRAELEN, G; SIMOEN, E; DECLERCK, G. J et al.I.E.E.E. transactions on electron devices. 1992, Vol 39, Num 10, pp 2278-2283, issn 0018-9383Article

A simple method for sub-100 nm pattern generation with I-line double-patterning techniqueTSAI, Tzu-I; LIN, Horng-Chih; JIAN, Min-Feng et al.Microelectronics and reliability. 2010, Vol 50, Num 5, pp 584-588, issn 0026-2714, 5 p.Article

CMOS scaling for sub-90 nm to sub-10 nmIWAI, Hiroshi.International Conference on Embedded Systems DesignInternational Conference on VLSI Design. 2004, pp 30-35, isbn 0-7695-2072-3, 1Vol, 6 p.Conference Paper

High-performance single-crystalline-silicon TFTs on a non-alkali glass substrateSANO, Yasuyuki; TAKEI, Michiko; HARA, Akito et al.IEDm : international electron devices meeting. 2002, pp 565-568, isbn 0-7803-7462-2, 4 p.Conference Paper

Characteristics and device design of sub-100 nm strained si N- and PMOSFETsRIM, K; CHU, J; OTT, J et al.Symposium on VLSI technology. 2002, pp 98-99, isbn 0-7803-7312-X, 2 p.Conference Paper

Transistors with dual work function metal gates by single full silicidation (FUSI) of polysilicon gatesMASZARA, W. P; KRIVOKAPIC, Z; KING, P et al.IEDm : international electron devices meeting. 2002, pp 367-370, isbn 0-7803-7462-2, 4 p.Conference Paper

Monte Carlo simulation of PHEMTs operating up to terahertz frequenciesHOARE, D; ABRAM, R. A.International journal of electronics. 1997, Vol 83, Num 4, pp 429-439, issn 0020-7217Article

Low-frequency noise measurements on submicrometre n-channel and p-channel MOSFETs at various operating regionsBELAHRACH, H; DEGERLI, Y; LAVERNHE, F et al.International journal of electronics. 2001, Vol 88, Num 4, pp 411-421, issn 0020-7217Article

Experimental 0.1-μm p-channel MOSFET with p+-polysilicon gate on 35-Å gate oxideTAUR, Y; COHEN, S; REEVES, C et al.IEEE electron device letters. 1993, Vol 14, Num 6, pp 304-306, issn 0741-3106Article

Intervalley scattering in the quasi-two-dimensional-electron gas of a <100> p-Si inversion layerMAGNUS, W.Solid-state electronics. 1993, Vol 36, Num 6, pp 843-849, issn 0038-1101Article

Correlation between photoluminescence data and device performance of p-channel strained-layer materialsJONES, E. D; ZIPPERIAN, T. E; LYO, S. K et al.Journal of electronic materials. 1990, Vol 19, Num 6, pp 533-537, issn 0361-5235Article

Location- and Orientation-Controlled (100) and (110) Single-Grain Si TFTs Without Seed SubstrateTAO CHEN; ISHIHARA, Ryoichi; BEENAKKER, Kees et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 9, pp 2348-2352, issn 0018-9383, 5 p.Article

Threshold voltage instabilities in p-channel power VDMOSFETs under pulsed NBT stressSTOJADINOVIC, N; DANKOVIC, D; MANIC, I et al.Microelectronics and reliability. 2010, Vol 50, Num 9-11, pp 1278-1282, issn 0026-2714, 5 p.Conference Paper

Current-handling and switching performance of MOS-controlled thyristor (MCT) structuresBAUER, F; HOLLENBECK, H; STOCKMEIER, T et al.IEEE electron device letters. 1991, Vol 12, Num 6, pp 297-299, issn 0741-3106, 3 p.Article

Field effect transistor based on a modified DNA baseMARUCCIO, Giuseppe; VISCONTI, Paolo; GOTTARELLI, Giovanni et al.Nano letters (Print). 2003, Vol 3, Num 4, pp 479-483, issn 1530-6984, 5 p.Article

Poly (p -phenylenevinylene ) -based field-effect transistors with platinum source-drain electrodesKAYASHIMA, Hiroshi; YASUDA, Takeshi; FUJITA, Katsuhiko et al.Journal of physics. D, Applied physics (Print). 2007, Vol 40, Num 6, pp 1646-1648, issn 0022-3727, 3 p.Article

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