Pascal and Francis Bibliographic Databases

Help

Search results

Your search

kw.\*:("Circuit mémoire")

Document Type [dt]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Publication Year[py]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Discipline (document) [di]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Language

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Author Country

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Results 1 to 25 of 329

  • Page / 14
Export

Selection :

  • and

SYNTHESE D'UN DISPOSITIF D'INFORMATION OPTIMALKUPRIYANOV VV.1975; IZVEST. VYSSH. UCHEBN. ZAVED., PRIBOROSTR.; S.S.S.R.; DA. 1975; VOL. 18; NO 7; PP. 35-39; BIBL. 4 REF.Article

Few electron devices: Towards hybrid CMOS-SET integrated circuitsIONESCU, Adrian M; DECLERCQ, Michel J; MAHAPATRA, Santanu et al.Design automation conference. 2002, pp 88-93, isbn 1-58113-461-4, 6 p.Conference Paper

Single-shot measurement of the Josephson charge qubitASTAFIEV, O; PASHKIN, Yu. A; YAMAMOTO, T et al.Physical review B. Condensed matter and materials physics. 2004, Vol 69, Num 18, pp 180507.1-180507.4, issn 1098-0121Article

Déchiffrement des résultats d'expérience de diagnostic sur un dispositif asynchrone avec mémoireTARGAMADZE, A. EH.Avtomatika i telemehanika. 1984, Num 2, pp 133-142, issn 0005-2310Article

A 4Gb/s/pin dual-reference simultaneous bidirectional I/O circuit for memory-bus interfaceKIM, Woo-Seop; CHOI, Jung-Hwan; KIM, Jin-Hyun et al.IEEE International Solid-State Circuits Conference. 2004, pp 412-413, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

A method to eliminate the event accumulation problem from a memory affected by multiple bit upsetsMAESTRO, Juan Antonio; REVIRIEGO, Pedro.Microelectronics and reliability. 2009, Vol 49, Num 7, pp 707-715, issn 0026-2714, 9 p.Article

Vertebrates that never sleep : Implications for sleep's basic functionKAVANAU, J. L.Brain research bulletin. 1998, Vol 46, Num 4, pp 269-279, issn 0361-9230Article

Working memory networks and the origin of language areas in the human brainABOITIZ, F.Medical hypotheses. 1995, Vol 44, Num 6, pp 504-506, issn 0306-9877Article

Milieux opérationnels de logique-mémoire. Questions d'application et de synthèseRAJKHLIN, V. A.Avtomatika i telemehanika. 1983, Num 11, pp 161-171, issn 0005-2310Article

DESCRIPTION ET UTILISATION D'UNE UNITE ARITHMETIQUE A MEMOIRE.BERTHON L; SPRINGER J.1975; ELECTRON. MICROELECTRON. INDUSTR.; FR.; DA. 1975; NO 202; PP. 24-27Article

Techniques for leakage energy reduction in deep submicrometer cache memoriesFRUSTACI, Fabio; CORSONELLO, Pasquale; PERRI, Stefania et al.IEEE transactions on very large scale integration (VLSI) systems. 2006, Vol 14, Num 11, pp 1238-1249, issn 1063-8210, 12 p.Article

SUR UNE METHODE DE DETECTION DES PANNES ISOLEES DANS LES SCHEMAS A MEMOIREPLITMAN AD.1972; AVTOMAT. I TELEMEKH.; S.S.S.R.; DA. 1972; NO 10; PP. 166-173; ABS. ANGL.; BIBL. 6 REF.Serial Issue

Emerging Nanoscale Memory and Logic Devices : A Critical AssessmentHUTCHBY, Fames A; CAVIN, Ralph; ZBIRNOV, Victor et al.Computer (Long Beach, CA). 2008, Vol 41, Num 5, pp 28-32, issn 0018-9162, 5 p.Article

Protein-Based Disk Recording at Areal Densities beyond 10 Terabits/inKHIZROEV, S; IKKAWI, R; AMOS, N et al.MRS bulletin. 2008, Vol 33, Num 9, pp 864-871, issn 0883-7694, 8 p.Article

Prévoir l'avenir du paysage audiovisuel = Future forcast for audiovisualLAVEN, P. A.UER-revue technique. 1998, Num 276, pp 4-11, issn 1019-6595Article

An efficient finite-state machine implementation of Huffman decodersIYENGAR, V; CHAKRABARTY, K.Information processing letters. 1997, Vol 64, Num 6, pp 271-275, issn 0020-0190Article

Multiple-valued logic memory circuitCURRENT, K. W.International journal of electronics. 1995, Vol 78, Num 3, pp 547-555, issn 0020-7217Article

Self-initializing memory elementsBAPIRAJU VINNAKOTA; RAMESH HARJANI.IEEE transactions on circuits and systems. 2, Analog and digital signal processing. 1995, Vol 42, Num 7, pp 461-472, issn 1057-7130Article

Circuit analysis of the memristive stateful implication gateXUDONG FANG; YUHUA TANG.Electronics letters. 2013, Vol 49, Num 20, pp 1282-1283, issn 0013-5194, 2 p.Article

Computing with Novel Floating-Gate Devices : NANOSCALE ARCHITECTURESSCHINKE, Daniel; DI SPIGNA, Neil; SHIVESHWARKAR, Mihir et al.Computer (Long Beach, CA). 2011, Vol 44, Num 2, pp 29-36, issn 0018-9162, 8 p.Article

On the dynamics of a single-bit stochastic-resonance memory deviceIBANEZ, S. A; FIERENS, P. I; PERAZZO, R. P. J et al.The European physical journal. B, Condensed matter physics (Print). 2010, Vol 76, Num 1, pp 49-55, issn 1434-6028, 7 p.Article

A CMOS macro-model for MTJ resistor of MRAM cellCHO, Chung-Hyun; JU HYUN KO; KIM, Daejeong et al.Physica status solidi. A. Applied research. 2004, Vol 201, Num 8, pp 1653-1657, issn 0031-8965, 5 p.Conference Paper

A silicon single-electron transistor memory operating at room temperatureGUO, L; LEOBANDUNG, E; CHOU, S. Y et al.Science (Washington, D.C.). 1997, Vol 275, Num 5300, pp 649-651, issn 0036-8075Article

Resistive circuit topologies that admit several solutionsFOSSEPREZ, M; HASLER, M.International journal of circuit theory and applications. 1990, Vol 18, Num 6, pp 625-638, issn 0098-9886Article

Is memristor a dynamic element?BAO, B. C; LIU, Z; LEUNG, H et al.Electronics letters. 2013, Vol 49, Num 24, pp 1523-1525, issn 0013-5194, 3 p.Article

  • Page / 14