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Logical arithmeticCLEARY, J. G.Future computing systems. 1987, Vol 2, Num 2, pp 125-149Article

A formald HDL and its use in the FM9001 verificationHUNT, W. A; BROCK, B. C.Philosophical transactions-Royal Society of London. Physical sciences and engineering. 1992, Vol 339, Num 1652, pp 35-47, issn 0962-8428Article

Q-Coder adaptive binary arithmetic coderIBM journal of research and development. 1988, Vol 32, Num 6, pp 716-795, issn 0018-8646Article

Diviseurs de puissance dans les circuits intégrés microondes en volumeBAL'SEVICH, A. S; GVOZDEV, V. I; NEFEDOV, E. I et al.Radiotehnika i èlektronika. 1987, Vol 32, Num 7, pp 1505-1511, issn 0033-8494Article

Using all signed-digit representations to design single integer multipliers using subexpression eliminationDEMPSTER, A. G; MACLEOD, M. D.IEEE International Symposium on Circuits and Systems. 2004, pp 165-168, isbn 0-7803-8251-X, 4 p.Conference Paper

IEEE Symposium on Computer ArithmeticIEEE transactions on computers. 1998, Vol 47, Num 7, pp 721-786, issn 0018-9340Conference Proceedings

Algorithm to reduce the number of shifts and additions in multiplier blocks using serial arithmeticJOHANSSON, Kenny; GUSTAFSSON, Oscar; DEMPSTER, Andrew G et al.Mediterranean electrotechnical conference. 2004, isbn 0-7803-8271-4, 3Vol, Vol.1, 197-200Conference Paper

Residue number system scaling schemesYINAN KONG; PHILLIPS, Braden.SPIE proceedings series. 2005, isbn 0-8194-5609-8, 2Vol, Part 2, 525-536Conference Paper

Multiple product modulo arbitrary numbersBERTRAM-KRETZBERG, C; HOFMEISTER, T.Information and computation (Print). 1996, Vol 131, Num 1, pp 81-93, issn 0890-5401Article

Simulation of fixed-point operations with high-level languagesPEPE, R. A; ROGERS, J. D.IEEE transactions on acoustics, speech, and signal processing. 1987, Vol 35, Num 1, pp 116-118, issn 0096-3518Article

On the complex residue arithmetic system (CRNS)TAYLOR, F. J.IEEE transactions on acoustics, speech, and signal processing. 1986, Vol 34, Num 6, pp 1675-1677, issn 0096-3518Article

Deterministic polynomial identity testing in non commutative modelsRAZ, Ran; SHPILKA, Amir.IEEE Conference on Computational Complexity. 2004, pp 215-222, isbn 0-7695-2120-7, 1Vol, 8 p.Conference Paper

Multilinear-NC1 ¬= Multilinear-NC2RAZ, Ran.Annual Symposium on Foundations of Computer Science. 2004, pp 344-351, isbn 0-7695-2228-9, 1Vol, 8 p.Conference Paper

A direct version of Shamir and Snir's lower bounds on monotone circuit depthTIWARI, P; TOMPA, M.Information processing letters. 1994, Vol 49, Num 5, pp 243-248, issn 0020-0190Article

Robust Asynchronous Carry Lookahead AddersBALASUBRAMANIAN, P; EDWARDS, D. A; ARABNIA, H. R et al.Computer design. International conferenceWorldComp'2011. 2011, pp 119-124, isbn 1-60132-173-2, 6 p.Conference Paper

Speculative Carry Generation With Prefix AdderCHOI, Youngmoon; SWARTZLANDER, Earl E.IEEE transactions on very large scale integration (VLSI) systems. 2008, Vol 16, Num 3, pp 321-326, issn 1063-8210, 6 p.Article

Study on the wavelength characteristic of the emission patterns in dielectric barrier discharge by photoelectricity methodLIU, Shuhua; DONG, Lifang; FAN, Weili et al.Proceedings of SPIE, the International Society for Optical Engineering. 2008, pp 66220W.1-66220W.6, issn 0277-786X, isbn 978-0-8194-6764-5Conference Paper

Arithmetic circuits and polynomial replacement systemsMCKENZIE, Pierre; VOLLMER, Heribert; WAGNER, Klaus W et al.SIAM journal on computing (Print). 2004, Vol 33, Num 6, pp 1513-1531, issn 0097-5397, 19 p.Article

Arithmetic circuits for discrete logarithmsVON ZUR GATHEN, Joachim.Lecture notes in computer science. 2004, pp 557-566, issn 0302-9743, isbn 3-540-21258-2, 10 p.Conference Paper

Low-complexity bit-serial constant-coefficient multipliersJOHANSSON, Kenny; GUSTAFSSON, Oscar; WANHAMMAR, Lars et al.IEEE International Symposium on Circuits and Systems. 2004, pp 649-652, isbn 0-7803-8251-X, 4 p.Conference Paper

Efficient synthesiser for generation of fast parallel multipliersHSIAO, S.-F; JIANG, M.-R.IEE proceedings. Computers and digital techniques. 2000, Vol 147, Num 1, pp 49-52, issn 1350-2387Article

Depth-efficient simulation of Boolean semi-unbounded circuits by arithmetic onesDAMM, C.Information processing letters. 1999, Vol 69, Num 4, pp 175-179, issn 0020-0190Article

A current-conveyor-based multiplier/divider cellPICCIRILLI, M. C.International journal of circuit theory and applications. 1996, Vol 24, Num 2, pp 233-237, issn 0098-9886Article

Self-timed design in GaAs : Case study of a high-speed, parallel multiplierCHANDRAMOULI, V; BRUNVAND, E; SMITH, K. F et al.IEEE transactions on very large scale integration (VLSI) systems. 1996, Vol 4, Num 1, pp 146-149, issn 1063-8210Article

On the reuse of addition in matrix multiplicationKALORKOTI, K.SIAM journal on computing (Print). 1995, Vol 24, Num 6, pp 1305-1312, issn 0097-5397Article

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