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Globale Aspekte homokliner BahnenKAHLERT, C.AEU. Archiv für Elektronik und Übertragungstechnik. 1992, Vol 46, Num 4, pp 266-273, issn 0001-1096Article

On-line training of recurrent neural networks with continuous topology adaptationOBRADOVIC, D.IEEE transactions on neural networks. 1996, Vol 7, Num 1, pp 222-228, issn 1045-9227Article

Multivalued dynamic circuitsHUERTAS, J. L; BARRIGA, A; SANCHEZ-GOMEZ, G et al.Electronics Letters. 1987, Vol 23, Num 10, pp 502-504, issn 0013-5194Article

Dynamics of π-junction interferometer circuitsKORNEV, V. K; BORISENKO, I. V; MOZHAEV, P. B et al.Physica. C. Superconductivity and its applications. 2002, Vol 367, Num 1-4, pp 285-289Article

On linear dynamic complementary systemsLEENAERTS, D. M. W.IEEE transactions on circuits and systems. 1, Fundamental theory and applications. 1999, Vol 46, Num 8, pp 1022-1026, issn 1057-7122Article

Indices de qualité généralisés de cellules actives du 2ème ordreMASLENNIKOV, V. V.Radiotehnika (Moskva). 1988, Num 6, pp 28-31, issn 0033-8486Article

A burn-in tolerant dynamic circuit techniqueALVANDPOUR, A; KRISHRTMIURTHY, R; BORKAR, S et al.Custom integrated circuits conference. 2002, pp 81-84, isbn 0-7803-7250-6, 4 p.Conference Paper

Leakage-Biased Domino circuits for dynamic fine-grain leakage reductionHEO, Seongmoo; ASANOVIC, Krste.2002 symposium on VLSI circuits. 2002, pp 316-319, isbn 0-7803-7310-3, 4 p.Conference Paper

IAPDL-based low-power adiabatic programmable logic arrayLAU, K. T; LIU, F.Microelectronics journal. 2000, Vol 31, Num 4, pp 235-238, issn 0959-8324Article

Optical approach of automatic dynamic range limitationWANG, J; LU, Z; NI, X et al.IEE proceedings. Optoelectronics. 1998, Vol 145, Num 3, pp 201-204, issn 1350-2433Article

Runtime reconfigurable routingBREBNER, G; DONLIN, A.Lecture notes in computer science. 1998, pp 25-30, issn 0302-9743, isbn 3-540-64359-1Conference Paper

BiCMOS domino : a novel high-speed dynamic BiCMOS logicMENON, S. M; JAYASUMANA, A. P; MALAIYA, Y. K et al.International journal of electronics. 1997, Vol 83, Num 2, pp 177-189, issn 0020-7217Article

Analysis of linear dynamic circuits by conjugating the subprocesses in their subcircuitsSHAKIROV, M. A.Journal of communications technology & electronics. 1996, Vol 41, Num 4, pp 331-340, issn 1064-2269Article

GaAs pipelined dynamic logicHOE, D. H. K; SALAMA, C. A. T.Integration (Amsterdam). 1991, Vol 12, Num 1, pp 93-105, issn 0167-9260Article

MMAPC: an extensive mixed-mode circuit simulator using dynamic circuit partition processCHEN, B; ONODA, M; KANEKO, M et al.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1988, Vol 71, Num 4, pp 388-393, issn 0387-236XArticle

Verification of dynamically reconfigurable logicROBINSON, D; LYSAGHT, P.Lecture notes in computer science. 2000, pp 141-150, issn 0302-9743, isbn 3-540-67899-9Conference Paper

Extending Dynamic Circuit Switching to meet the challenges of new FPGA architecturesGREGOR, G. M. C; LYSAGHT, P.Lecture notes in computer science. 1997, pp 31-40, issn 0302-9743, isbn 3-540-63465-7Conference Paper

Chaos and structures in a chain of mutually-coupled Chua's circuitsOSIPOV, G. V; SHALFEEV, V. D.IEEE transactions on circuits and systems. 1, Fundamental theory and applications. 1995, Vol 42, Num 10, pp 693-699, issn 1057-7122Article

Analysis of switching devices with bond graphsBUISSON, J.Journal of the Franklin Institute. 1993, Vol 330, Num 6, pp 1165-1175, issn 0016-0032Article

A dynamic and static microcomputer-based stereogram generatorOBAIDAT, M. S; LEGUIRE, L. E.IEEE transactions on systems, man, and cybernetics. 1991, Vol 21, Num 1, pp 228-231, issn 0018-9472Article

ZZ model method for initial condition analysis of dynamics networksZHANG ZUHAO.IEEE transactions on circuits and systems. 1991, Vol 38, Num 8, pp 937-941, issn 0098-4094Article

A new small swing domino logic for low-power consumptionYANG, Sung-Hyun; CHO, Kyoung-Rok.SPIE proceedings series. 2004, pp 303-309, isbn 0-8194-5167-3, 7 p.Conference Paper

Pipelines in dynamic dual-rail circuitsYANG, Jing-Ling; CHOY, Chiu-Sing; CHAN, Cheong-Fat et al.Lecture notes in computer science. 2004, pp 701-710, issn 0302-9743, isbn 3-540-23095-5, 10 p.Conference Paper

Improved functional simulation of dynamically reconfigurable logicROBERTSON, Ian; IRVINE, James; LYSAGHT, Patrick et al.Lecture notes in computer science. 2002, pp 152-161, issn 0302-9743, isbn 3-540-44108-5, 10 p.Conference Paper

Automatic generation of design constraints in verifying high performance embedded dynamic circuitsBHADRA, Jayanta; KRISHNAMURTHY, Narayanan.Proceedings - International Test Conference. 2002, pp 213-222, issn 1089-3539, isbn 0-7803-7542-4, 10 p.Conference Paper

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