On optimal merging networksAMANO, Kazuyuki; MARUOKA, Akira.Lecture notes in computer science. 2003, pp 152-161, issn 0302-9743, isbn 3-540-40671-9, 10 p.Conference Paper

Design and implementation of self-testable full range window comparatorWONG, Mike W. T; YUBIN ZHANG.Asian test symposium. 2004, pp 314-318, isbn 0-7695-2235-1, 1Vol, 5 p.Conference Paper

Enhanced input range dynamic comparator for pipeline analogue-to-digital converterLEE, S. M; SONG, T; CHO, C et al.Electronics letters. 2009, Vol 45, Num 14, pp 728-730, issn 0013-5194, 3 p.Article

Periodic multisorting comparator networksKIK, Marcin.Lecture notes in computer science. 2003, pp 132-143, issn 0302-9743, isbn 3-540-40543-7, 12 p.Conference Paper

Concurrent on-line testing of identical circuits through output comparison using non-identical input vectorsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 469-476, isbn 0-7695-2241-6, 1Vol, 8 p.Conference Paper

Rich dynamics in weakly-coupled full-range cellular neural networksDI MARCO, M; FORTI, M; TESI, A et al.IEEE International Symposium on Circuits and Systems. 2004, pp 41-44, isbn 0-7803-8251-X, 4 p.Conference Paper

Analog-to-digital converter based on RSFQ technology for radio astronomy applicationsMAEZAWA, Masaaki; SUZUKI, Motohiro; SASAKI, Hitoshi et al.Superconductor science & technology (Print). 2001, Vol 14, Num 12, pp 1106-1110, issn 0953-2048Conference Paper

Efficient Hamming weight comparators of binary vectorsPIESTRAK, S. J.Electronics Letters. 2007, Vol 43, Num 11, pp 611-612, issn 0013-5194, 2 p.Article

Improved upper bound for sorting by short swapsFENG, X; MENG, Z; SUDBOROUGH, I. H et al.International Symposium on Parallel Architectures, Algorithms, and Networks. 2004, pp 98-103, isbn 0-7695-2135-5, 1Vol, 6 p.Conference Paper

Improved Upper Bound for Sorting by Short SwapsFENG, X; MENG, Z; SUDBOROUGH, I. H et al.International Symposium on Parallel Architectures, Algorithms, and Networks. 2004, pp 98-103, isbn 0-7695-2135-5, 1Vol, 6 p.Conference Paper

A TECHNIQUE FOR IMPLEMENTING N-BIT LOOKAHEAD COMPARATORSPAPACHRISTOU CA.1979; CONFERENCE ON INFORMATION SCIENCES AND SYSTEMS/1979-03-28/BALTIMORE MD; USA; BALTIMORE: THE JOHNS HOPKINS UNIVERSITY; DA. 1979; PP. 456-460; BIBL. 8 REF.Conference Paper

Monopulse comparator with frequency-independent delta-channel nulls for high-resolution tracking radarYANG, N; CALOZ, C; WU, K et al.Electronics letters. 2011, Vol 47, Num 5, pp 339-340, issn 0013-5194, 2 p.Article

A compact ring-style 8-port comparator circuit using coupled linesRIBLET, G. P.IEEE transactions on microwave theory and techniques. 1993, Vol 41, Num 6-7, pp 1224-1226, issn 0018-9480Article

Circuit technique for a MOS precision comparatorDAN, C; NICOLAE, D; BODEA, M et al.Revue roumaine des sciences techniques. Electrotechnique et énergétique. 1992, Vol 37, Num 2, pp 205-210, issn 0035-4066Article

Simultaneous clock recovery for 160 Gbit/s optical time-division multiplexing signal using phase modulationZHANG, S. J; LIU, Y; GOMEZ-AGIS, F et al.Electronics letters. 2011, Vol 47, Num 22, pp 1238-1240, issn 0013-5194, 3 p.Article

Cascaded voting process for flash ADC with interpolating schemeJANG, Y.-C.Electronics Letters. 2008, Vol 44, Num 18, pp 1047-1048, issn 0013-5194, 2 p.Article

Low-power high-speed current comparator designBANKS, D; TOUMAZOU, C.Electronics Letters. 2008, Vol 44, Num 3, pp 171-172, issn 0013-5194, 2 p.Article

Research on Minitype High peak and narrow width pulsed driver circuit of LDZHANG HE; CHENBINGLIN; YUAN PING et al.MWSCAS : Midwest symposium on circuits and systems. 2004, isbn 0-7803-8346-X, 3Vol, Vol II, 325-328Conference Paper

Fully source-coupled logic based multiple-valued VLSIIKE, Tsukasa; HANYU, Takahiro; KAMEYAMA, Michitaka et al.Proceedings - International Symposium on Multiple-Valued Logic. 2002, pp 270-275, issn 0195-623X, isbn 0-7695-1462-6, 6 p.Conference Paper

Test for detection & location of intermittent faults in combinational circuitsISMAEEL, A. A; BHATNAGAR, R.IEEE transactions on reliability. 1997, Vol 46, Num 2, pp 269-274, issn 0018-9529Article

A content addressable memory using Josephson junctionsMORISUE, M; KANEKO, M; HOSOYA, H et al.IEEE Transactions on applied superconductivity. 1991, Vol 1, Num 1, pp 48-53, 6 p.Article

Investigation of the relationship between the gray zone and the clock frequency of a Josephson comparatorHADDAD, T; WETZSTEIN, O; ENGERT, S et al.Superconductor science & technology (Print). 2011, Vol 24, Num 9, issn 0953-2048, 095010.1-095010.6Article

Experimentally verified design guidelines for minimizing the gray zone width of Josephson comparatorsEBERT, Bjoern; MIELKE, Olaf; KUNERT, Juergen et al.Superconductor science & technology (Print). 2010, Vol 23, Num 5, issn 0953-2048, 055005.1-055005.8Article

6-bit 1.6-GS/s 85-mW Flash Analog to Digital Converter Using Symmetric Three-Input ComparatorKIM, Yun-Jeong; LEE, Jong-Ho; KOO, Ja-Hyun et al.IEICE transactions on electronics. 2008, Vol 91, Num 3, pp 392-395, issn 0916-8524, 4 p.Article

4 Gbit/s receiver with adaptive blind DFEMILIJEVIC, S; KWASNIEWSKI, T.Electronics Letters. 2005, Vol 41, Num 25, pp 1373-1374, issn 0013-5194, 2 p.Article