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A dual-band 802.11a/b/g radio in 0.18μm CMOSPERRAUD, L; PINATEL, C; RECOULY, M et al.IEEE International Solid-State Circuits Conference. 2004, pp 94-95, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Characterization of poly-buffered LOCOS in manufacturing environmentGULDI, R. L; MCKEE, B; DAMMINGA, G. M et al.Journal of the Electrochemical Society. 1989, Vol 136, Num 12, pp 3815-3820, issn 0013-4651, 6 p.Article

A triple-level wired 24K-gate CMOS gate arraySAIGO, T; NIWA, K; OHTO, T et al.IEEE journal of solid-state circuits. 1985, Vol 20, Num 5, pp 1005-1011, issn 0018-9200Article

A simple high-gain CMOS voltage comparator circuitFREITAS, D. A; CURRENT, K. W.International journal of electronics. 1984, Vol 57, Num 2, pp 195-198, issn 0020-7217Article

2-to-1 selector IC in 90-nm CMOS technology operating up to 50 Gb/sYAMAMOTO, Takuji; YAMAZAKI, Daisuke; HORINAKA, Minoru et al.IEEE Compound Semiconductor Integrated Circuit Symposium. 2004, pp 243-246, isbn 0-7803-8616-7, 1Vol, 4 p.Conference Paper

Dynamics of heavy-ion-induced latchup in CMOS structuresAOKI, T.I.E.E.E. transactions on electron devices. 1988, Vol 35, Num 11, pp 1885-1891, issn 0018-9383, 1Article

Architecture of a CMOS correlatorCORRY, A; PATEL, K.GEC journal of research. 1983, Vol 1, Num 1, pp 35-38, issn 0264-9187Article

A single-chip CMOS micro-hotplate array for hazardous-gas detection and material characterizationBARRETTINO, D; GRAF, M; HAFIZOVIC, S et al.IEEE International Solid-State Circuits Conference. 2004, pp 312-313, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Four quadrant multiplier core with lateral bipolar transistor in CMOS technologyHONG, Z; MELCHIOR, H.Electronics Letters. 1985, Vol 21, Num 2, pp 72-73, issn 0013-5194Article

Design of CMOS for 60GHz applicationsDOAN, Chinh H; EMAMI, Sohrab; NIKNEJAD, All M et al.IEEE International Solid-State Circuits Conference. 2004, pp 440-441, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

A simple current-to-time converterDAMLJANOVIC, D.IEEE transactions on instrumentation and measurement. 1985, Vol 34, Num 1, pp 87-88, issn 0018-9456Article

PENETRATION DU CHAMP ELECTRIQUE DANS LE SUPRACONDUCTEUR DE MICROPONTS JOSEPHSONAMATUNI L EH; GUBANKOV VN; ZAJTSEV AV et al.1982; ZURNAL EKSPERIMENTAL'NOJ I TEORETICESKOJ FIZIKI; ISSN 0044-4510; SUN; DA. 1982; VOL. 83; NO 5; PP. 1851-1863; ABS. ENG; BIBL. 19 REF.Article

THE PERFORMANCE OF DSW MACHINES FOR VLSI RESEARCHSTEVENSON JJM; ROBERTSON JM.1982; MICROELECTRONICS; ISSN 0026-2692; GBR; DA. 1982; VOL. 13; NO 6; PP. 33-37; BIBL. 5 REF.Article

CMOS scaling theory : Why our theory of everything still works, and what that means for the futureFOTY, Daniel; GILDENBLAT, Gennady.IEEE international symposium on electron devices for microwave and optoelectronic applications. 2004, pp 27-38, isbn 0-7803-8574-8, 1Vol, 12 p.Conference Paper

A four-channel ADSL2+ analog front end for CO applications with 75mW per channel built in 0.13μm cmosPESSL, Peter; HOHL, Johannes; GAGGL, Richard et al.IEEE International Solid-State Circuits Conference. 2004, pp 402-403, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Variability reduction in CMOS operational amplifiers through layout modificationBHATTACHARYYA, A. B; AGGARWAL, S.IEE proceedings. Part G. Electronic circuits and systems. 1989, Vol 136, Num 2, pp 79-83, issn 0143-7089, 5 p.Article

A high-performance bipolar/CMOS process―CIT2VOLZ, C; BLOSSFELD, L.I.E.E.E. transactions on electron devices. 1988, Vol 35, Num 11, pp 1861-1865, issn 0018-9383, 1Article

Analysis of a source-coupled CMOS multivibratorFINVERS, I. G; FILANOVSKY, I. M.IEEE transactions on circuits and systems. 1988, Vol 35, Num 9, pp 1182-1185, issn 0098-4094Article

Latched domino CMOS logicPRETORIUS, J. A; SHUBAT, A. S; SALAMA, C. A. T et al.IEEE journal of solid-state circuits. 1986, Vol 21, Num 4, pp 514-522, issn 0018-9200Article

A 20-V four-quadrant CMOS analog multiplierBABANEZHAD, J. N; TEMES, G. C.IEEE journal of solid-state circuits. 1985, Vol 20, Num 6, pp 1158-1168, issn 0018-9200Article

An 8-MHz CMOS subranging 8-bit A/D converterDINGWALL, A. G. F; ZAZZU, V.IEEE journal of solid-state circuits. 1985, Vol 20, Num 6, pp 1138-1143, issn 0018-9200Article

Advanced CMOS devices: Part I conventional devices and technology optionsWONG, H.-S. Philip.Proceedings - Electrochemical Society. 2005, pp 3-12, issn 0161-6374, isbn 1-56677-463-2, 10 p.Conference Paper

A CMOS dual-band fractional-N synthesizer with reference doubler and compensated charge pumpHUH, Hyungki; KOO, Yido; KIM, Wonchan et al.IEEE International Solid-State Circuits Conference. 2004, pp 100-101, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Designing outside rail constraintsANNEMA, Anne-Johan; NAUTA, Bram; VAN LANGEVELDE, Ronald et al.IEEE International Solid-State Circuits Conference. 2004, pp 134-135, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

A new criterion for transient latchup analysis in bulk CMOSYEU-HAW YANG; CHUNG-YU WU.I.E.E.E. transactions on electron devices. 1989, Vol 36, Num 7, pp 1336-1347, issn 0018-9383, 12 p.Article

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