kw.\*:("Convertidor AN")
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Converter Voltage Reference Performance Improvement SecretsOLJACA, Miroslav; KLEIN, William.IEEE instrumentation & measurement magazine. 2009, Vol 12, Num 5, pp 21-27, issn 1094-6969, 7 p.Article
An 80MHz 10b pipeline ADC with dynamic range doubling and dynamic reference selectionSTROEBLE, Olaf; DIAS, Victor; SCHWOERER, Christoph et al.IEEE International Solid-State Circuits Conference. 2004, pp 462-463, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper
A pipelined 13-bit, 250-ks/s, 5-V analog-to-digital converterSEHAT SUTARJA; GRAY, P. R.IEEE journal of solid-state circuits. 1988, Vol 23, Num 6, pp 1316-1323, issn 0018-9200Article
A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converterBANG-SUP SONG; TOMPSETT, M. F; LAKSHMIKUMAR, K. R et al.IEEE journal of solid-state circuits. 1988, Vol 23, Num 6, pp 1324-1333, issn 0018-9200Article
High-resolution, current-mode A/D convertors using active current mirrorsNAIRN, D. G; SALAMA, C. A. T.Electronics Letters. 1988, Vol 24, Num 21, pp 1331-1332, issn 0013-5194Article
Photonic analog-to-digital convertersSHOOP, B. L.SPIE proceedings series. 1998, pp 252-255, isbn 0-8194-2949-XConference Paper
A 12b 80MS/s pipelined ADC with bootstrapped digital calibrationGRACE, Carl R; HURST, Paul J; LEWIS, Stephen H et al.IEEE International Solid-State Circuits Conference. 2004, pp 460-461, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper
A 1.8V 1.6GS/s 8b self-calibrating folding ADC with 7.26 ENOB at nyquist frequencyTAFT, Robert; MENKUS, Chris; TURSI, Maria Rosaria et al.IEEE International Solid-State Circuits Conference. 2004, pp 252-253, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper
Enhanced double-histogram testJALON, M. A; RUEDA, A; PERALIAS, E et al.Electronics letters. 2009, Vol 45, Num 7, pp 349-351, issn 0013-5194, 3 p.Article
A 14b-linear capacitor self-trimming pipelined ADCRYU, Seung-Tak; RAY, Sourja; SONG, Bang-Sup et al.IEEE International Solid-State Circuits Conference. 2004, pp 464-465, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper
New method of reduction of a methodical error of self-calibration for ADC on the basis of redundant positional number systemsAZAROV, A; ZAKHARCHENKO, S; ARKHIPCHUK, A et al.SPIE proceedings series. 2001, pp 22-26, isbn 0-8194-4136-8Conference Paper
A 10-bit MHz two-step parallel A/D converter with internal S/HSHIMIZU, T; HOTTA, M; MAIO, K et al.IEEE journal of solid-state circuits. 1989, Vol 24, Num 1, pp 13-20, issn 0018-9200, 8 p.Article
Convertisseurs A-N = AD ConvectersMesures (1983). 1986, Vol 51, Num 13, pp 39-47, issn 0755-219X, 6 p.Article
Improved architecture for low-distortion ΔΣ ADCsLEE, K; TEMES, G. C.Electronics letters. 2009, Vol 45, Num 14, pp 730-731, issn 0013-5194, 2 p.Article
A 1.2V 220MS/s 10b pipeline ADC implemented in 0.13μm digital CMOSHERNES, Bjørnar; BRISKEMYR, Atle; ANDERSEN, Terje N et al.IEEE International Solid-State Circuits Conference. 2004, pp 256-257, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper
Statistical artifacts in the ratio of discrete quantitiesJOHNSTON, R. G; SCHRODER, S. D; RAJIKA MALLAWAARATCHY, A et al.The American statistician. 1995, Vol 49, Num 3, pp 285-291, issn 0003-1305Article
A floating-point A/D converter with self-calibrationOOTOMO, G; TSUKAMOTO, K; WATAHIKI, T et al.Transactions of the Institute of electronics, information and communication engineers. 1988, Vol 71, Num 12, pp 1302-1309, issn 0913-574XArticle
An 8-bit 100-MHz full-nyquist analog-to-digital converterVAN DE PLASSCHE, R. J; BALTUS, P.IEEE journal of solid-state circuits. 1988, Vol 23, Num 6, pp 1334-1344, issn 0018-9200Article
Composants. Convertisseur NA = Components. AD ConvectersMesures (1983). 1987, Vol 52, Num 9, pp 65-69, issn 0755-219X, 3 p.Article
A simple design methodology for testable flash A/D converter output encodingSIMPSON, M. L; WILLIAMS, R. D.IEEE transactions on instrumentation and measurement. 1988, Vol 37, Num 4, pp 605-609, issn 0018-9456Article
Mikrorechnergestützte Analog-Digital-Umsetzer nach dem taktsynchronen Ladungsausgleichsverfahren = Convertisseur analogique numérique équipé de microordinateur fonctionnant d'après le procédé d'équilibrage de charge synchrone = AN convectors with microprocessor wich operates according to the balancing process of the synchronous loadsRÄBIGER, T.Wissenschaftliche Zeitschrift der Technischen Hochschule Otto von Guericke Magdeburg. 1986, Vol 30, Num 8, pp 8-10, issn 0541-8933Article
Time-to-digital converter with an analog interpolation circuitKOSTAMOVAARA, J; MYLLYLA, R.Review of scientific instruments. 1986, Vol 57, Num 11, pp 2880-2885, issn 0034-6748Article
A digitally enhanced 1.8V 15b 40MS/s CMOS pipelined ADCSIRAGUSA, E; GALTON, I.IEEE International Solid-State Circuits Conference. 2004, pp 452-453, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper
Dynamic characterization of scan conversion-based transient digitizersARPAIA, P; CENNAMO, F; DAPONTE, P et al.IEEE transactions on instrumentation and measurement. 1995, Vol 44, Num 3, pp 643-646, issn 0018-9456Conference Paper
Measuring harmonic distortion and noise floor of an A/D converter using spectral averagingYIH-CHYUN JENQ.IEEE transactions on instrumentation and measurement. 1988, Vol 37, Num 4, pp 525-528, issn 0018-9456Article