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Results 1 to 25 of 846

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Validation of MOSFET model source-drain symmetryMCANDREW, Colin C.I.E.E.E. transactions on electron devices. 2006, Vol 53, Num 9, pp 2202-2206, issn 0018-9383, 5 p.Article

A new compact high dI/dt gate drive unit for 6-inch GCTsGRUENING, H; KOYANAGI, K.International Symposium on Power Semiconductor Devices & ICs. 2004, pp 265-268, isbn 4-88686-060-5, 4 p.Conference Paper

High-performance bulk CMOS technology for 65/45 nm nodesSUGII, T.Solid-state electronics. 2006, Vol 50, Num 1, pp 2-9, issn 0038-1101, 8 p.Conference Paper

Direct tunneling gate current in deep submicron MOSFETsZAMAN, S; HAQUE, A.SPIE proceedings series. 2002, pp 743-745, isbn 0-8194-4500-2, 2VolConference Paper

A comparative study of scaling properties of MOS transistors in CHE and CHISEL injection regimeMOHAPATRA, Nihar R; MAHAPATRA, Souvik; RAMGOPAL RAO, V et al.SPIE proceedings series. 2002, pp 686-689, isbn 0-8194-4500-2, 2VolConference Paper

Leakage current correction in quasi-static C-V measurementsSCHMITZ, J; WEUSTHOF, M. H. H; HOF, A. J et al.2004 international conference on microelectronic test structures. 2004, pp 179-181, isbn 0-7803-8262-5, 1Vol, 3 p.Conference Paper

Impact of gate underlap on gate capacitance and gate tunneling current in 16nm DGMOS devicesBANSAL, Aditva; PAUL, Bipul C; ROY, Kaushik et al.IEEE international SOI conference. 2004, pp 94-95, isbn 0-7803-8497-0, 1Vol, 2 p.Conference Paper

Simulation of gate lag and current collapse in GaN heterojunction field effect transistorsBRAGA, N; MICKEVICIUS, R; GASKA, R et al.IEEE Compound Semiconductor Integrated Circuit Symposium. 2004, pp 287-290, isbn 0-7803-8616-7, 1Vol, 4 p.Conference Paper

Towards 0.5 nm EOT scaling of HfO2/metal electrode gate stacksPETERSON, Jeff J; BROWN, George A; MAJHI, Prashant et al.Proceedings - Electrochemical Society. 2004, pp 443-451, issn 0161-6374, isbn 1-56677-417-9, 9 p.Conference Paper

Implications of progressive wear-out for lifetime extrapolation of ultra-thin (EOT ∼ 1 nm) SiON filmsKACZER, B; DEGRAEVE, R; O'CONNOR, R et al.International Electron Devices Meeting. 2004, pp 713-716, isbn 0-7803-8684-1, 1Vol, 4 p.Conference Paper

Effect of thermal annealing on MIST-deposited HFSIO4/SIOX/SI structuresCHANG, K; LEE, D.-O; SHANMUGASUNDARAM, K et al.Proceedings - Electrochemical Society. 2003, pp 429-435, issn 0161-6374, isbn 1-56677-396-2, 7 p.Conference Paper

Transistors with dual work function metal gates by single full silicidation (FUSI) of polysilicon gatesMASZARA, W. P; KRIVOKAPIC, Z; KING, P et al.IEDm : international electron devices meeting. 2002, pp 367-370, isbn 0-7803-7462-2, 4 p.Conference Paper

Optimization of sub 100 nm Γ-gate Si-mosfets for RF applicationsGUPTA, Mayank; VIDYA, V; RAMGOPAL RAO, V et al.SPIE proceedings series. 2002, pp 652-656, isbn 0-8194-4500-2, 2VolConference Paper

Gate-Variable Optical Transitions in GrapheneFENG WANG; YUANBO ZHANG; CHUANSHAN TIAN et al.Science (Washington, D.C.). 2008, Vol 320, Num 5873, pp 206-209, issn 0036-8075, 4 p.Article

Evaluation of power cut-off techniques in the presence of gate leakageDRAZDZIULIS, Mindaugas; LARSSON-EDEFORS, Per.IEEE International Symposium on Circuits and Systems. 2004, pp 745-748, isbn 0-7803-8251-X, 4 p.Conference Paper

Emerging floating-body effects in advanced partially-depleted SOI devicesPOIROUX, T; FAVNOT, O; TABONE, C et al.IEEE International SOI conference. 2002, pp 99-100, isbn 0-7803-7439-8, 2 p.Conference Paper

Formation of high resistivity phases of nickel silicide at small areaTOMITA, R; KIMURA, H; YASUDA, M et al.Microelectronics and reliability. 2013, Vol 53, Num 5, pp 659-664, issn 0026-2714, 6 p.Article

A comparative study on device degradation under a positive gate stress and hot carrier stress in InGaZnO thin film transistorsHYUN JUN JANG; SEUNG MIN LEE; CHONG GUN YU et al.Microelectronics and reliability. 2013, Vol 53, Num 9-11, pp 1814-1817, issn 0026-2714, 4 p.Conference Paper

Impact of random dopant fluctuations on trap-assisted tunnelling in nanoscale MOSFETsGERRER, L; MARKOV, S; AMOROSO, S. M et al.Microelectronics and reliability. 2012, Vol 52, Num 9-10, pp 1918-1923, issn 0026-2714, 6 p.Conference Paper

Unclamped repetitive stress on 1200 V normally-off SiC JFETsABBATE, C; BUSATTO, G; IANNUZZO, F et al.Microelectronics and reliability. 2012, Vol 52, Num 9-10, pp 2420-2425, issn 0026-2714, 6 p.Conference Paper

Resistance modulation of multilayer graphene controlled by the gate electric field : GrapheneMIYAZAKI, Hisao; SONGLIN LI; KANDA, Akinobu et al.Semiconductor science and technology. 2010, Vol 25, Num 3, issn 0268-1242, 034008.1-034008.8Article

Scaling potential and MOSFET integration of thermally stable Gd silicate dielectricsGOTTLOB, H. D. B; SCHMIDT, M; CHERKAOUI, K et al.Microelectronic engineering. 2009, Vol 86, Num 7-9, pp 1642-1645, issn 0167-9317, 4 p.Conference Paper

Measurement of Enhanced Gate-Controlled Band-to-Band Tunneling in Highly Strained Silicon-Germanium DiodesNAYFEH, Osama M; NI CHLEIRIGH, Cait; HOYT, Judy L et al.IEEE electron device letters. 2008, Vol 29, Num 5, pp 468-470, issn 0741-3106, 3 p.Article

Characteristics of AlGaAs/GaAs heterostructure RT-SCR modelBARKANA, B. D.Microelectronics journal. 2008, Vol 39, Num 12, pp 1504-1508, issn 0959-8324, 5 p.Article

Fully 3D self-consistent quantum transport simulation of Double-gate and Tri-gate 10 nm FinFETsKHAN, H; MAMALUY, D; VASILESKA, D et al.Journal of computational electronics (Print). 2008, Vol 7, Num 3, pp 346-349, issn 1569-8025, 4 p.Conference Paper

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