Low cost 65nm CMOS platform for low power & general purpose applicationsARNAUD, F; DURIEZ, B; REYNARD, J. P et al.Symposium on VLSI Technology. sd, pp 10-11, isbn 0-7803-8289-7, 1Vol, 2 p.Conference Paper

Electron beam direct write process development for sub 45nm CMOS manufacturingTODESCHINI, J; PAIN, L; MANAKLI, S et al.SPIE proceedings series. 2005, isbn 0-8194-5733-7, 2Vol, Part 1, 408-416Conference Paper

Optimized nickel silicide process formation for high performance sub-65nm CMOS nodesFROMENT, B; CARRON, V; MORAND, Y et al.Proceedings - Electrochemical Society. 2004, pp 191-201, issn 0161-6374, isbn 1-56677-406-3, 11 p.Conference Paper