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A monotonic digitally controlled delay elementMAYMANDI-NEJAD, Mohammad; SACHDEV, Manoj.IEEE journal of solid-state circuits. 2005, Vol 40, Num 11, pp 2212-2219, issn 0018-9200, 8 p.Article

LIGNE A RETARD DISCRETE, LARGE BANDESAZANOV VI; YAREMENKO NG.1977; PRIBORY TEKH. EKSPER.; S.S.S.R.; DA. 1977; NO 3; PP. 125-126; BIBL. 2 REF.Article

A High-Precision On-Chip Path Delay Measurement ArchitectureSONGWEI PEI; HUAWEI LI; XIAOWEI LI et al.IEEE transactions on very large scale integration (VLSI) systems. 2012, Vol 20, Num 9, pp 1565-1577, issn 1063-8210, 13 p.Article

An observer of systems with delays in state variablesWATANABE, K; OUCHI, T.International Journal of Control. 1985, Vol 41, Num 1, pp 217-229, issn 0020-7179Article

Computing maximum delay deviation allowed to retain stability in systems with two delaysKEQIN GU; NICULESCU, Silviu-Iulian; JIE CHEN et al.Applications of time delay systems. Lecture notes in control and information sciences. 2007, pp 157-164, issn 0170-8643, isbn 3-540-49555-X, 1Vol, 8 p.Book Chapter

Diffusive representation for operators involving delaysMONTSENY, Gérard.Applications of time delay systems. Lecture notes in control and information sciences. 2007, pp 217-232, issn 0170-8643, isbn 3-540-49555-X, 1Vol, 16 p.Book Chapter

A survey of linear matrix inequality techniques in stability analysis of delay systemsSHENGYUAN XU; LAM, James.International journal of systems science. 2008, Vol 39, Num 12, pp 1095-1113, issn 0020-7721, 19 p.Article

Identification of Delay Measurable PDFs Using Linear Dependency RelationshipsFLANIGAN, Edward; TRAGOUDAS, Spyros.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 6, pp 1011-1015, issn 1063-8210, 5 p.Article

Delay differential equations with time - varying delay: Stability, control, and numericsLOUISELL, James.Ecole d'été d'automatique de Grenoble. Session. 2000, 60 p.Conference Paper

Synthesis of delay-verifiable combinational circuitsWUUDIANN KE; MENON, P. R.IEEE transactions on computers. 1995, Vol 44, Num 2, pp 213-222, issn 0018-9340Article

A simulator for at-speed robust testing of path delay faults in combinational circuitsHSU, Y.-C; GUPTA, S. K.IEEE transactions on computers. 1996, Vol 45, Num 11, pp 1312-1318, issn 0018-9340Article

On equivalence and efficiency of certain stability criteria for time-delay systemsSHENGYUAN XU; LAM, James.IEEE transactions on automatic control. 2007, Vol 52, Num 1, pp 95-101, issn 0018-9286, 7 p.Article

Approximating the stability region of a neural network with a general distribution of delaysJESSOP, R; CAMPBELL, S. A.Neural networks. 2010, Vol 23, Num 10, pp 1187-1201, issn 0893-6080, 15 p.Article

APPAREIL DE MESURE IMPULSIONNEL DU TEMPS DE RETARD DE GROUPE DES LIGNES A RETARD DE PRECISION AMELIOREEPERETYAGIN IV; PORONIK BI.1976; PRIBORY TEKH. EKSPER.; S.S.S.R.; DA. 1976; NO 5; PP. 127-130; BIBL. 3 REF.Article

Design and analysis of a jitter-tolerant digital delay-locked-loop based fraction-of-clock delay lineBURNHAM, James R; YEH, Gerard K; SUN, Enoch et al.IEEE International Solid-State Circuits Conference. 2004, pp 352-353, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Randomization procedures in the computation of cumulative-time distributions over discrete state Markov processesMELAMED, B; YADIN, M.Operations research. 1984, Vol 32, Num 4, pp 926-944, issn 0030-364XArticle

Analysis and attenuation proposal in ground bounceZENTENO, Antonio; CHAMPAC, Victor H; RENOVELL, Michell et al.Asian test symposium. 2004, pp 460-463, isbn 0-7695-2235-1, 1Vol, 4 p.Conference Paper

Phase-conditionally stable systemsALBERTOS, Pedro.Systems & control letters. 2006, Vol 55, Num 10, pp 803-808, issn 0167-6911, 6 p.Article

Digitally controlled duty cycle corrector with 1 ps resolutionJO, Youngkwon; PARK, Hoyoung; YANG, Sanghyuk et al.IEICE transactions on electronics. 2007, Vol 90, Num 9, pp 1841-1843, issn 0916-8524, 3 p.Article

Concatenated solutions of delay-differential equations and their representation with time-delay feedback systemsHAGIWARA, Tomomichi; KOBAYASHI, Masahiro.International journal of control. 2011, Vol 84, Num 4-6, pp 1126-1139, issn 0020-7179, 14 p.Article

Full-MOSFET mixed-mode duty cycle correctorWU, J. H; GU, J. H; ZHANG, L. Z et al.Electronics letters. 2011, Vol 47, Num 19, pp 1067-1069, issn 0013-5194, 3 p.Article

Analysis and design of fast settling voltage-controlled delay line with dual-input interpolating delay cellsSONG, H. Y; JEONG, D.-K.Electronics letters. 2010, Vol 46, Num 11, pp 749-750, issn 0013-5194, 2 p.Article

Jugement du tribunal des affaires de sécurité sociale de la Charente du 13 mars 1990: aff. Sicard c. URSSA F1992, pp 36-38Book

A New Method for Complete Stability Analysis of Cellular Neural Networks With Time DelayCHEN, Wu-Hua; WEI XING ZHENG.IEEE transactions on neural networks. 2010, Vol 21, Num 7, pp 1126-1139, issn 1045-9227, 14 p.Article

DISPOSITIF TRANSISTORISE DE RETARD TEMPOREL REGLABLEROMANOV SI.1982; PRIB. THE. EKSP.; ISSN 0032-8162; SUN; DA. 1982; NO 4; PP. 127-128; BIBL. 1 REF.Article

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