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Results 1 to 25 of 444

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A pragmatic design methodology using proper isolation and doping for bulk FinFETsLIAO, Yi-Bo; CHIANG, Meng-Hsueh; LAI, Yu-Sheng et al.Solid-state electronics. 2013, Vol 85, pp 48-53, issn 0038-1101, 6 p.Article

Analytical unified threshold voltage model of short-channel FinFETs and implementationFASARAKIS, N; TSORMPATZOGLOU, A; TASSIS, D. H et al.Solid-state electronics. 2011, Vol 64, Num 1, pp 34-41, issn 0038-1101, 8 p.Article

3D simulation of triple-gate MOSFETs with different mobility regionsCONDE, J; CERDEIRA, A; PAVANELLO, M et al.Microelectronic engineering. 2011, Vol 88, Num 7, pp 1633-1636, issn 0167-9317, 4 p.Article

Fully 3D self-consistent quantum transport simulation of Double-gate and Tri-gate 10 nm FinFETsKHAN, H; MAMALUY, D; VASILESKA, D et al.Journal of computational electronics (Print). 2008, Vol 7, Num 3, pp 346-349, issn 1569-8025, 4 p.Conference Paper

Comparative Simulation Analysis of Process-Induced Variability in Nanoscale SOI and Bulk Trigate FinFETsBROWN, Andrew R; DAVAL, Nicolas; BOURDELLE, Konstantin K et al.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 11, pp 3611-3617, issn 0018-9383, 7 p.Article

Demonstration of asymmetric gate-oxide thickness four-terminal FinFETs having flexible threshold voltage and good subthreshold slopeMASAHARA, Meishoku; SURDEANU, Radu; JURCZAK, Malgorzata et al.IEEE electron device letters. 2007, Vol 28, Num 3, pp 217-219, issn 0741-3106, 3 p.Article

Approaching Optimal Characteristics of 10-nm High-Performance Devices : A Quantum Transport Simulation Study of Si FinFETKHAN, Hasanur R; MAMALUY, Denis; VASILESKA, Dragica et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 3, pp 743-753, issn 0018-9383, 11 p.Article

Random dopant fluctuation in limited-width FinFET technologiesCHIANG, Meng-Hsueh; LIN, Jeng-Nan; KIM, Keunwoo et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 8, pp 2055-2060, issn 0018-9383, 6 p.Article

Multi-gate devices for the 32 nm technology node and beyond : Challenges for Selective Epitaxial GrowthCOLLAERT, N; ROOYACKERS, R; HIKAVYY, A et al.Thin solid films. 2008, Vol 517, Num 1, pp 101-104, issn 0040-6090, 4 p.Conference Paper

Performance Enhancement of Tunnel Field-Effect Transistors by Synthetic Electric Field EffectMORITA, Yukinori; MORI, Takahiro; MASAHARA, Meishoku et al.IEEE electron device letters. 2014, Vol 35, Num 7, pp 792-794, issn 0741-3106, 3 p.Article

Domino logic designs for high-performance and leakage-tolerant applicationsMORADI, Farshad; TUAN VU CAO; VATAJELU, Elena I et al.Integration (Amsterdam). 2013, Vol 46, Num 3, pp 247-254, issn 0167-9260, 8 p.Article

Interactions Between Line Edge Roughness and Random Dopant Fluctuation in Nonplanar Field-Effect Transistor VariabilityLEUNG, Greg; CHI ON CHUI.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 10, pp 3277-3284, issn 0018-9383, 8 p.Article

Fabrication of Bulk-Si FinFET using CMOS compatible processZHOU HUAJIE; SONG YI; XU QIUXIA et al.Microelectronic engineering. 2012, Vol 94, pp 26-28, issn 0167-9317, 3 p.Article

Independently-Controlled-Gate FinFET Schmitt Trigger Sub-Threshold SRAMsHSIEH, Chien-Yu; FAN, Ming-Long; HU, Vita Pi-Ho et al.IEEE transactions on very large scale integration (VLSI) systems. 2012, Vol 20, Num 7, pp 1201-1210, issn 1063-8210, 10 p.Article

Low frequency noise characterization in n-channel FinFETsTALMAT, R; ACHOUR, H; CRETU, B et al.Solid-state electronics. 2012, Vol 70, pp 20-26, issn 0038-1101, 7 p.Conference Paper

Comparative Analysis of SEU in FinFET SRAM Cells for Superthreshold and Subthreshold Supply Voltage OperationRATHOD, S. S; SAXENA, A. K; SUDEB DASGUPTA et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 10, pp 3630-3634, issn 0018-9383, 5 p.Article

Grain-Orientation Induced Quantum Confinement Variation in FinFETs and Multi-Gate Ultra-Thin Body CMOS Devices and Implications for Digital Design : CHARACTERIZATION OF NANO CMOS VARIABIALITY BY SIMULATION AND MEASUREMENTSHADI RASOULI, Seid; ENDO, Kazuhiko; CHEN, Jone F et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 8, pp 2282-2292, issn 0018-9383, 11 p.Article

Microwave FinFET modeling based on artificial neural networks including lossy silicon substrateMARINKOVIC, Zlatica; CRUPI, Giovanni; SCHREURS, Dominique M. M.-P et al.Microelectronic engineering. 2011, Vol 88, Num 10, pp 3158-3163, issn 0167-9317, 6 p.Article

A Novel Nanoinjection Lithography (NInL) Technology and Its Application for 16-nm Node Device FabricationCHEN, Hou-Yu; CHEN, Chun-Chi; HSUEH, Fu-Kuo et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 11, pp 3678-3686, issn 0018-9383, 9 p.Article

Modeling study on carrier mobility in ultra-thin body FinFETs with circuit-level implicationsPOLJAK, Mirko; JOVANOVIC, Vladimir; SULIGOJ, Tomislav et al.Solid-state electronics. 2011, Vol 65-66, pp 130-138, issn 0038-1101, 9 p.Conference Paper

FinFET Mismatch in Subthreshold Region: Theory and ExperimentsMAGNONE, Paolo; CRUPI, Felice; MERCHA, Abdelkarim et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 11, pp 2848-2856, issn 0018-9383, 9 p.Article

FinFET SRAM Optimization With Fin Thickness and Surface OrientationMINGU KANG; SONG, S. C; WOO, S. H et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 11, pp 2785-2793, issn 0018-9383, 9 p.Article

SRAM Read/Write Margin Enhancements Using FinFETsCARLSON, Andrew; ZHENG GUO; BALASUBRAMANIAN, Sriram et al.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 6, pp 887-900, issn 1063-8210, 14 p.Article

Experimental characterization of the subthreshold leakage current in triple-gate FinFETsTSORMPATZOGLOU, A; DIMITRIADIS, C. A; MOUIS, M et al.Solid-state electronics. 2009, Vol 53, Num 3, pp 359-363, issn 0038-1101, 5 p.Article

High Injection Efficiency and Low-Voltage Programming in a Dopant-Segregated Schottky Barrier (DSSB) FinFET SONOS for NOR-type Flash MemoryCHOI, Sung-Jin; HAN, Jin-Woo; CHOI, Yang-Kyu et al.IEEE electron device letters. 2009, Vol 30, Num 3, pp 265-268, issn 0741-3106, 4 p.Article

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