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A TEST CALCULATION ALGORITHM FOR MODULE-LEVEL COMBINATIONAL NETWORKSSZIRAY J.1979; DIGIT. PROCESS; CHE; DA. 1979; VOL. 5; NO 1-2; PP. 17-26; ABS. FRE/GER; BIBL. 12 REF.Article

DIGITAL NETWORK TEST GENERATION USING T-EXPRESSIONS.BRAY DW.1976; DIGIT. PROCESS.; SWITZ.; DA. 1976; VOL. 2; NO 3; PP. 181-207; ABS. FR. ALLEM.; BIBL. 11 REF.Article

DIAGNOSIS OF SHORT-CIRCUIT FAULTS IN COMBINATIONAL CIRCUITS.FRIEDMAN AD.1974; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1974; VOL. 23; NO 7; PP. 746-752; BIBL. 6 REF.Article

A HEURISTIC APPROACH TO THE GENERATION OF TESTS FOR FAULTS ON THE INTERMEDIATE LINESALI ATHAR KHAN; HARPREET SINGH; NANDA NK et al.1982; COMPUTERS & ELECTRICAL ENGINEERING; ISSN 0045-7906; USA; DA. 1982; VOL. 9; NO 2; PP. 81-87; BIBL. 4 REF.Article

A DESIGN LANGUAGE BASED APPROACH TO TEST SEQUENCE GENERATION.HILL FJ; HUEY B.1977; COMPUTER; U.S.A.; DA. 1977; VOL. 10; NO 6; PP. 28-33; BIBL. 15 REF.Article

ON TEST GENERATION FOR ASYNCHRONOUS SEQUENTIAL CIRCUITS.SARRIS AA; MOR M; SMITH EJ et al.1976; IN: I.T.C.S.6. 1976 INT. SYMP. FAULT-TOLERANT COMPUT.; PITTSBURGH, PA.; 1976; LONG BEACH; INST. ELECTR. ELECTRON. ENG.; DA. 1976; PP. 61-68; BIBL. 1 P.Conference Paper

COMMENTS ON "APPLICATION OF FAULT FOLDING IN TEST GENERATION FOR LOGIC CIRCUITS"AGARWAL VK.1980; DIGIT. PROCESS.; CHE; DA. 1980; VOL. 6; NO 1; PP. 105-110; ABS. FRE/GER; BIBL. 8 REF.Article

COMMON MISCONCEPTIONS INDIGITAL TEST GENERATION.THOMAS JJ.1977; COMPUTER DESIGN; U.S.A.; DA. 1977; VOL. 16; NO 1; PP. 89-94; BIBL. 6 REF.Article

AN EXAMINATION OF ALGEBRAIC TEST GENERATION METHODS FOR MULTIPLE FAULTS.CARROLL BD; SHAH HG; JONES DM et al.1974; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1974; VOL. 23; NO 7; PP. 743-745; BIBL. 7 REF.Article

TEST GENERATION ALGORITHMS FOR COMPUTER HARDWARE DESCRIPTION LANGUAGESLEVENDEL YK; MENON PM.1982; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1982; VOL. 31; NO 7; PP. 577-588; BIBL. 22 REF.Article

TEST CALCULATION FOR LOGIC NETWORKS BY COMPOSITE JUSTIFICATIONSZIRAY J.1979; DIGIT. PROCESS; CHE; DA. 1979; VOL. 5; NO 1-2; PP. 3-15; ABS. FRE/GER; BIBL. 10 REF.Article

TEST GENERATION IN COMBINATIONAL NETWORKS BY DECOMPOSITION.PAPAIOANNOU SG.1976; COMPUTERS ELECTR. ENGNG.; G.B.; DA. 1976; VOL. 3; NO 4; PP. 387-394; BIBL. 6 REF.Article

A LOGIC SYSTEM FOR FAULT TEST GENERATION.AKERS SB JR.1976; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1976; VOL. 25; NO 6; PP. 620-630; BIBL. 2 REF.Article

A NINE-VALUED CIRCUIT MODEL FOR TEST GENERATION.MUTH P.1976; I.E.E.E. TRANS. COMPUTERS; U.S.A.; DA. 1976; VOL. 25; NO 6; PP. 630-636; BIBL. 7 REF.Article

SUR LA VERIFICATION DES SYSTEMES DIGITAUX.VERDILLON A.1977; ; S.L.; DA. 1977; PP. (142P.); BIBL. DISSEM.; (THESE DOCT. SCI. INF.; UNIV. SCI. MED.-INST. NATL. POLYTECH. GRENOBLE)Thesis

A DIAGNOSTIC MODEL FOR ANY-TYPE-FAULT TEST GENERATION IN SWITCHING CIRCUITSNOWICKI M.1980; DIGIT. PROCESS.; CHE; DA. 1980; VOL. 6; NO 1; PP. 69-74; ABS. FRE/GER; BIBL. 8 REF.Article

Test case generation according to the binary search strategyBEYDEDA, Sami; GRUHN, Volker.Lecture notes in computer science. 2003, pp 1000-1007, issn 0302-9743, isbn 3-540-20409-1, 8 p.Conference Paper

Layout influences testabilitySPENCER, T. H; SAVIR, J.IEEE transactions on computers. 1985, Vol 34, Num 3, pp 287-290, issn 0018-9340Article

On the acceleration of test generation algorithmsFUJIWARA, H; SHIMONO, T.IEEE transactions on computers. 1983, Vol 32, Num 12, pp 1137-1144, issn 0018-9340Article

Compression assessment based on medical image quality concepts using computer-generated test imagesKOCSIS, O; COSTARIDOU, L; MANDELLOS, G et al.Computer methods and programs in biomedicine. 2003, Vol 71, Num 2, pp 105-115, issn 0169-2607, 11 p.Article

Automated generation of unit tests for refactoringWALTER, Bartosz; PIETRZAK, Blazej.Lecture notes in computer science. 2004, pp 211-214, issn 0302-9743, isbn 3-540-22137-9, 4 p.Conference Paper

PROCEEDINGS/ACM IEEE 18TH DESIGN AUTOMATION CONFERENCE, NASHVILLE TN, JUNE 29-JULY 1,19811981; DESIGN AUTOMATION CONFERENCE. 18/1981-06-29/NASHVILLE TN; USA; NEW YORK: INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS; DA. 1981; 914 P.; 28 CMConference Proceedings

Comments on fault diagnosis of MOS combinational networksKUANG-WI CHIANG; VRANESIC, Z. G.IEEE transactions on computers. 1984, Vol 33, Num 10, issn 0018-9340, 947Article

Functional testing of microprocessorsDHANANJAY BRAHME; ABRAHAM, J. A.IEEE transactions on computers. 1984, Vol 33, Num 6, pp 475-485, issn 0018-9340Article

Stuck-at fault tests in the presence of undetectable bridging faultsYAMADA, T; NANYA, T.IEEE transactions on computers. 1984, Vol 33, Num 8, pp 758-761, issn 0018-9340Article

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