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A GA with heuristic-based decoder for IC floorplanningGWEE, B. H; LIM, M. H.Integration (Amsterdam). 1999, Vol 28, Num 2, pp 157-172, issn 0167-9260Article

Design of several asynchronous-logic macrocells for a low-voltage micropower cell libraryCHONG, K.-S; GWEE, B.-H; CHANG, J. S et al.IET circuits, devices & systems (Print). 2007, Vol 1, Num 2, pp 161-169, issn 1751-858X, 9 p.Article

Fast and memory-efficient invariant computation of ordinary Petri netsLAW, C.-F; GWEE, B.-H; CHANG, J. S et al.IET computers & digital techniques (Print). 2007, Vol 1, Num 5, pp 612-624, issn 1751-8601, 13 p.Article

Low energy 16-bit Booth leapfrog array multiplier using dynamic addersCHONG, K.-S; GWEE, B.-H; CHANG, J.-S et al.IET circuits, devices & systems (Print). 2007, Vol 1, Num 2, pp 170-174, issn 1751-858X, 5 p.Article

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