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Hardware acceleration and verification of systems designed with hardware description languages (HDL)WISNIEWSKI, Remigiusz; WEGRZYN, Marek.SPIE proceedings series. 2005, pp 365-376, isbn 0-8194-5756-6, 12 p.Conference Paper

Modeling of vertical and lateral phototransistors using VHDL-AMSALEXANDRE, A; PINNA, A; GRANADO, B et al.IEEE International conference on industria technologyl. 2004, isbn 0-7803-8662-0, 3Vol, Vol1, 142-147Conference Paper

Component reuse in B using ACL2ZIMMERMANN, Yann; TOMA, Diana.Lecture notes in computer science. 2005, pp 279-298, issn 0302-9743, isbn 3-540-25559-1, 20 p.Conference Paper

Bringing test to design: Testing in the designer's event based environmentRAJSUMAN, Rochit.IEEE/CPMT International Electronics Manufacturing Technology Symposium. 2002, pp 372-375, issn 1089-8190, isbn 0-7803-7301-4, 4 p.Conference Paper

Designing reconfigurable systems in LavaSINGH, Satnam.International Conference on Embedded Systems DesignInternational Conference on VLSI Design. 2004, pp 299-306, isbn 0-7695-2072-3, 1Vol, 8 p.Conference Paper

CGADL: An Architecture Description Language for Coarse-Grained Reconfigurable ArraysOLIVEIRA, Julio; MASEKOWSKY, Stephan; SCHWEIZER, Thomas et al.IEEE transactions on very large scale integration (VLSI) systems. 2009, Vol 17, Num 9, pp 1247-1259, issn 1063-8210, 13 p.Article

Functional design using behavioural and structural componentsSHARP, Richard.ETAPS 2002 : European joint conference on theory and practice of software. Satellite workshop. 2002, pp 1-14Conference Paper

Genus two hyperelliptic curve coprocessorBOSTON, N; CLANCY, T; LIOW, Y et al.Lecture notes in computer science. 2002, pp 400-414, issn 0302-9743, isbn 3-540-00409-2, 15 p.Conference Paper

Hw-Sw codesign of a flexible neural controller through a FPGA-based neural network programmed in VHDLPASERO, E; PERRI, M.International Joint Conference on Neural Networks. 2004, isbn 0-7803-8359-1, 4Vol, Vol4, 3161-3165Conference Paper

FPGA based accelerator for functional simulationWAGEEH, Mohamed N; WAHBA, Ayman M; SALEM, Ashraf M et al.IEEE International Symposium on Circuits and Systems. 2004, pp 317-320, isbn 0-7803-8251-X, 4 p.Conference Paper

Global model generation for a capacitive silicon accelerometer by finite-element analysisANSEL, Y; ROMANOWICZ, B; RENAUD, P et al.Sensors and actuators. A, Physical. 1998, Vol 67, Num 1-3, pp 153-158, issn 0924-4247Conference Paper

In-vehicle network verification from application to physical layerPELZ, Georg; SCHAEFER, Juergen; METZNER, Dieter et al.SAE transactions. 2004, Vol 113, Num 7, pp 27-33, issn 0096-736X, 7 p.Article

Description and simulation of bio-inspired systems using VHDL-AMSDOMENECH-ASENSI, Ginés; LOPEZ-ALCANTUD, José A; RUIZ-MERINO, Ramon et al.Lecture notes in computer science. 2005, pp 357-365, issn 0302-9743, isbn 3-540-26319-5, 9 p.Conference Paper

A control board for optical modules of a high-energy neutrino telescopeGABRIELLI, Alessandro; GANDOLFI, Enzo; RICCI, Pierpaolo et al.Measurement science & technology (Print). 2002, Vol 13, Num 4, pp 590-597, issn 0957-0233Article

SystemC modelling of wireless communication channelCONTI, Massimo; ORCIONI, Simone.Proceedings of SPIE, the International Society for Optical Engineering. 2011, Vol 8067, issn 0277-786X, isbn 978-0-8194-8656-1, 80670F.1-80670F.11Conference Paper

System level validation using formal techniquesDRECHSLER, R; GROSSE, D.IEE proceedings. Computers and digital techniques. 2005, Vol 152, Num 3, pp 393-406, issn 1350-2387, 14 p.Article

A VHDL generator for elliptic curve cryptographyJÄRVINEN, Kimmo; TOMMISKA, Matti; SKYTTÄ, Jorma et al.Lecture notes in computer science. 2004, pp 1098-1100, issn 0302-9743, isbn 3-540-22989-2, 3 p.Conference Paper

Modelling solid-state linear X-ray sensors using a mixed-signal hardware description languageBORRAS, G; VUORINEN, K; ODET, C et al.Sensors and actuators. A, Physical. 1998, Vol 71, Num 1-2, pp 63-69, issn 0924-4247Conference Paper

The DAQ system for CLEO IIIWOLF, A; GWON, C; COPPAGE, D et al.Computer physics communications. 1998, Vol 110, Num 1-3, pp 91-94, issn 0010-4655Conference Paper

MATLAB/Simulink based methodology for rapid-FPGA-prototypingLICKO, Miroslav; SCHIER, Jan; TICHY, Milan et al.Lecture notes in computer science. 2003, pp 984-987, issn 0302-9743, isbn 3-540-40822-3, 4 p.Conference Paper

Debugging VHDL designs using temporal process instancesKÖB, Daniel; PEISCHL, Bernhard; WOTAWA, Franz et al.Lecture notes in computer science. 2003, pp 402-415, issn 0302-9743, isbn 3-540-40455-4, 14 p.Conference Paper

A framework for VHDL combining theorem proving and symbolic simulationGEORGELIN, Philippe; BORRIONE, Dominique; OSTIER, Pierre et al.ETAPS 2002 : European joint conference on theory and practice of software. Satellite workshopInternational workshop on the ACL2 theorem prover and its applications. 2002, pp 1-15Conference Paper

A VHDL library to analyse fault tolerant techniquesORTIGOSA, P. M; LOPEZ, O; ESTRADA, R et al.Lecture notes in computer science. 2003, pp 1036-1039, issn 0302-9743, isbn 3-540-40822-3, 4 p.Conference Paper

Laura: Leiden architecture research and exploration toolZISSULESCU, Claudiu; STEFANOV, Todor; KIENHUIS, Bart et al.Lecture notes in computer science. 2003, pp 911-920, issn 0302-9743, isbn 3-540-40822-3, 10 p.Conference Paper

Using Lava to design and verify recursive and periodic sortersCLAESSEN, Koen; SHEERAN, Mary; SINGH, Satnam et al.International journal on software tools for technology transfer (Print). 2003, Vol 4, Num 3, pp 349-358, issn 1433-2779, 10 p.Conference Paper

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