Fullerene-incorporation for enhancing the electron beam resist performance for contact hole patterning and fillingYOU, Hsin-Chiang; KO, Fu-Hsiang; LEI, Tan-Fu et al.Thin solid films. 2006, Vol 500, Num 1-2, pp 214-218, issn 0040-6090, 5 p.Article

Suppression of the floating-body effect in poly-Si thin-film transistors with self-aligned Schottky barrier source and ohmic body contact structureKUO, Po-Yi; CHAO, Tien-Sheng SR; LEI, Tan-Fu et al.IEEE electron device letters. 2004, Vol 25, Num 9, pp 634-636, issn 0741-3106, 3 p.Article

H₂ and NH₃ plasma passivation on poly-Si TFTs with bottom-sub-gate induced electrical junctionsYU, Cheng-Ming; LIN, Horng-Chih; HUANG, Tiao-Yuan et al.Journal of the Electrochemical Society. 2003, Vol 150, Num 12, pp G843-G848, issn 0013-4651Article

Poly-Si Thin-Film Transistor Nonvolatile Memory Using Ge Nanocrystals as a Charge Trapping Layer Deposited by the Low-Pressure Chemical Vapor DepositionKUO, Po-Yi; CHAO, Tien-Sheng; HUANG, Jyun-Siang et al.IEEE electron device letters. 2009, Vol 30, Num 3, pp 234-236, issn 0741-3106, 3 p.Article

Vertical n-Channel Poly-Si Thin-Film Transistors With Symmetric S/D Fabricated by Ni-Silicide-Induced Lateral-Crystallization TechnologyKUO, Po-Yi; CHAO, Tien-Sheng; LAI, Jiou-Teng et al.IEEE electron device letters. 2009, Vol 30, Num 3, pp 237-239, issn 0741-3106, 3 p.Article

Characteristics of self-aligned Si/Ge T-gate poly-Si thin-film transistors with high ON/OFF current ratioKUO, Po-Yi; CHAO, Tien-Sheng; HSIEH, Pei-Shan et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 5, pp 1171-1176, issn 0018-9383, 6 p.Article

Improvements in both thermal stability of Ni-silicide and electrical reliability of gate oxides using a stacked polysilicon gate structureJAM WEM LEE; LIN, Shen-Xiang; LEI, Tan-Fu et al.Journal of the Electrochemical Society. 2001, Vol 148, Num 9, pp G530-G533, issn 0013-4651Article

High-performance poly-Si TFTs with fully Ni-self-aligned silicided S/D and gate structureKUO, Po-Yi; CHAO, Tien-Sheng; WANG, Ren-Jie et al.IEEE electron device letters. 2006, Vol 27, Num 4, pp 258-261, issn 0741-3106, 4 p.Article

A novel process-compatible fluorination technique with electrical characteristic improvements of poly-Si TFTsWANG, Shen-De; LO, Wei-Hsiang; CHANG, Tzu-Yun et al.IEEE electron device letters. 2005, Vol 26, Num 6, pp 372-374, issn 0741-3106, 3 p.Article

The impact of deep Ni salicidation and NH₃ plasma treatment on nano-SOI FinFETsYOU, Hsin-Chiang; KUO, Po-Yi; KO, Fu-Hsiang et al.IEEE electron device letters. 2006, Vol 27, Num 10, pp 799-801, issn 0741-3106, 3 p.Article

Low-temperature polycrystalline silicon thin-film flash memory with hafnium silicateLIN, Yu-Hsien; CHIEN, Chao-Hsin; CHOU, Tung-Huan et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 3, pp 531-536, issn 0018-9383, 6 p.Article

Resist nano-modification technology for enhancing the lithography and etching performanceYOU, Hsin-Chiang; KO, Fu-Hsiang; LEI, Tan-Fu et al.Microelectronic engineering. 2005, Vol 78-79, pp 521-527, issn 0167-9317, 7 p.Conference Paper

Channel Film Thickness Effect of Low-Temperature Polycrystalline-Silicon Thin-Film TransistorsCHENG-YU MA, William; CHIANG, Tsung-Yu; YEH, Chi-Ruei et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 4, pp 1268-1272, issn 0018-9383, 5 p.Article

High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With TaN/HfO₂ Gate Stack StructureMA, Ming-Wen; CHAO, Tien-Sheng; SU, Chun-Jung et al.IEEE electron device letters. 2008, Vol 29, Num 6, pp 592-594, issn 0741-3106, 3 p.Article

SONOS-type flash memory using an HfO₂ as a charge trapping layer deposited by the sol-gel spin-coating methodYOU, Hsin-Chiang; HSU, Tze-Hsiang; KO, Fu-Hsiang et al.IEEE electron device letters. 2006, Vol 27, Num 8, pp 653-655, issn 0741-3106, 3 p.Article

Novel program versus disturb window characterization for split-gate flash cellSUNG, Hung-Cheng; LEI, Tan Fu; HSU, Te-Hsun et al.IEEE electron device letters. 2005, Vol 26, Num 3, pp 194-196, issn 0741-3106, 3 p.Article

Fabrication of sub-60-nm contact holes in silicon dioxide layersKO, Fu-Hsiang; YOU, Hsin-Chiang; CHU, Tieh-Chi et al.Microelectronic engineering. 2004, Vol 73-74, pp 323-329, issn 0167-9317, 7 p.Conference Paper

Impacts of Fluorine Ion Implantation With Low-Temperature Solid-Phase Crystallized Activation on High-κ LTPS-TFTMA, Ming-Wen; CHEN, Chih-Yang; SU, Chun-Jung et al.IEEE electron device letters. 2008, Vol 29, Num 2, pp 168-170, issn 0741-3106, 3 p.Article

Polycrystalline silicon thin-film transistor with nickel―titanium oxide by sol―gel spin-coating and nitrogen implantationWU, Shih-Chieh; HOU, Tuo-Hung; CHUANG, Shiow-Huey et al.Solid-state electronics. 2012, Vol 78, pp 11-16, issn 0038-1101, 6 p.Conference Paper

SONOS memories with embedded silicon nanocrystals in nitrideLIU, Mei-Chun; CHIANG, Tsung-Yu; CHAO, Tien-Sheng et al.Semiconductor science and technology. 2008, Vol 23, Num 7, issn 0268-1242, 075033.1-075033.4Article

Pentacene-based thin film transistors used to drive a twist-nematic liquid crystal displayWANG, Yu-Wu; CHENG, Horng-Long; WANG, Yi-Kai et al.Thin solid films. 2005, Vol 491, Num 1-2, pp 305-310, issn 0040-6090, 6 p.Article

Numerical simulation of quantum effects in high-k gate dielectric MOS structures using quantum mechanical modelsYIMING LI; LEE, Jam-Wem; TANG, Ting-Wei et al.Computer physics communications. 2002, Vol 147, Num 1-2, pp 214-217, issn 0010-4655, 4 p.Conference Paper

Characteristics of PBTI and Hot Carrier Stress for LTPS-TFT With High-κ Gate DielectricMA, Ming-Wen; CHEN, Chih-Yang; SU, Chun-Jung et al.IEEE electron device letters. 2008, Vol 29, Num 2, pp 171-173, issn 0741-3106, 3 p.Article

Reliability Mechanisms of LTPS-TFT With HfO₂ Gate Dielectric : PBTI, NBTI, and Hot-Carrier StressMA, Ming-Wen; CHEN, Chih-Yang; WU, Woei-Chemg et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 5, pp 1153-1160, issn 0018-9383, 8 p.Article

A reliability model for low-temperature polycrystalline silicon thin-film transistorsCHEN, Chih-Yang; LEE, Jam-Wem; LEE, Po-Hao et al.IEEE electron device letters. 2007, Vol 28, Num 5, pp 392-394, issn 0741-3106, 3 p.Article