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DESIGN OF LARGE ALUS USING MULTIPLE PLA MACROSSCHMOOKLER MS.1980; I.B.M. J. RES. DEVELOP.; USA; DA. 1980; VOL. 24; NO 1; PP. 2-14; BIBL. 6 REF.Article

OPTIMALISATION DES FONCTIONS BOOLEENNES ET UTILISATION DE RESEAUX LOGIQUES PROGRAMMESMONCHAUD S; LEMAIRE B; CHEN CHIN HUA et al.1978; NOUV. AUTOMATISME; FRA; DA. 1978; VOL. 23; NO 9-10; PP. 273-276Article

PLAS ZUR LOESUNG VON VERTEILUNGSAUFGABEN. = LES RESEAUX LOGIQUES PROGRAMMABLES POUR LA RESOLUTION DES PROBLEMES DE REPARTITIONEICHHOFER H; TIMM V.1977; ELEKTRONIK; DTSCH.; DA. 1977; VOL. 26; NO 6; PP. 59-76 (6P.); BIBL. 8 REF.Article

A HEURISTIC TEST-PATTERN GENERATOR FOR PROGRAMMABLE LOGIC ARRAYSEICHELBERGER EB; LINDBLOOM E.1980; I.B.M. J. RES. DEVELOP.; USA; DA. 1980; VOL. 24; NO 1; PP. 15-23; BIBL. 10 REF.Article

PLAS OR MPS. AT TIMES THEY COMPETE, AND AT OTHER TIMES THEY COOPERATE.1976; ELECTRON. DESIGN; U.S.A.; DA. 1976; VOL. 24; NO 18; PP. 24-30 (4P.)Article

METHODE DE CONSTRUCTION D'UN TEST DE CONTROLE POUR MATRICES LOGIQUES PROGRAMMABLESVOLYNSKIJ MB; NOVOSELOV VG.1983; MIKROELEKTRONIKA; ISSN 0544-1269; SUN; DA. 1983; VOL. 12; NO 1; PP. 55-64; BIBL. 8 REF.Article

FIELD-PROGRAMMABLE ARRAYS: POWERFUL ALTERNATIVES TO RANDOM LOGICCAVLAN N; DURHAM SJ.1979; ELECTRONICS; USA; DA. 1979; VOL. 52; NO 14; PP. 109-114Article

STRUCTURES HOMOGENES SPECIALISEES UTILISEES COMME MATRICES LOGIQUES PROGRAMMABLESFET YA I.1979; AVTOMAT. VYCHISLIT. TEKH.; SUN; DA. 1979; NO 6; PP. 67-72; BIBL. 11 REF.Article

AN ASSOCIATIVE LOGIC MATRIX.GREER DL.1976; I.E.E.E. J. SOLID. STATE CIRCUITS; U.S.A.; DA. 1976; VOL. 11; NO 5; PP. 679-691; BIBL. 14 REF.Article

MODIFIED PROGRAMMABLE LOGIC ARRAY WITH MORE PRODUCT TERMS.BENNETT LAM.1977; ELECTRON. LETTERS; G.B.; DA. 1977; VOL. 13; NO 15; PP. 443-445; BIBL. 1 REF.Article

DESIGN AUTOMATION AND THE PROGRAMMABLE LOGIC ARRAY MACROGOLDEN RL; LATUS PA; LOWY P et al.1980; I.B.M. J. RES. DEVELOP.; USA; DA. 1980; VOL. 24; NO 1; PP. 23-31; BIBL. 9 REF.Article

T2L SPEED IMPROVEMENT BY AN ION IMPLANTATION MODIFICATION TO A STANDARD BIPOLAR PROCESSPIETERS JP; LUTSCH AGK; LE ROUX HF et al.1983; MICROELECTRONICS; ISSN 0026-2692; GBR; DA. 1983; VOL. 14; NO 2; PP. 27-35; BIBL. 7 REF.Article

LOGIC CIRCUIT SIMULATION. IIACKEN JM; STAUFFER JD.1979; I.E.E.E. CIRCUITS SYST. MAG.; USA; DA. 1979; VOL. 1; NO 2; PP. 3-12; BIBL. 6 REF.Article

FPLA, PAL, FPLS: DES OUTILS POUR LA CONCEPTION DE SYSTEMES LOGIQUESBERNARD JM.1980; MINIS ET MICROS; FRA; DA. 1980; VOL. 5; NO 120; PP. 25-29Article

SCHWELLWERTFUNKTIONEN REALISIERT MIT FPLA. = LES FONCTIONS DE SEUIL REALISEES AU MOYEN DES FPLAPOL B.1977; ELEKTRONIK; DTSCH.; DA. 1977; VOL. 26; NO 7; PP. 59-64; BIBL. 8 REF.Article

COMBINED BINARY CODE TRANSLATION AND PARALLEL-TO-SERIAL CONVERSION USING STORED LOGIC ARRAYSITO MR; CAMERON RD.1978; I.E.E.E. TRANS. COMPUTERS; USA; DA. 1978; VOL. 27; NO 9; PP. 833-841; BIBL. 15 REF.Article

REALISATION SUR DES MATRICES LOGIQUES PROGRAMMABLES DES ALGORITHMES PARALLELES DE COMMANDE LOGIQUEZAKREVSKIJ AD.1983; AVTOMATIKA I TELEMEHANIKA; ISSN 0005-2310; SUN; DA. 1983; NO 7; PP. 116-123; ABS. ENG; BIBL. 8 REF.Article

IM BLICKPUNKT: ROMS, PROMS UND PLAS. TECHNOLOGIEN-ARTEN-PROGRAMMIERUNG. = PLEINS FEUX SUR LES ROMS, PROMS ET PLAS. TECHNOLOGIES-TYPES-PROGRAMMATIONTIMM V.1976; ELEKTRONIK; DTSCH.; DA. 1976; VOL. 25; NO 5; PP. 38-47; BIBL. 41 REF.Article

STRUCTURED LOGIC DESIGN OF INTEGRATED CIRCUITS USING THE STORAGE/LOGIC ARRAY (SLA)SMITH KF; CARTER TM; HUNT CE et al.1982; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1982; VOL. 17; NO 2; PP. 395-406; BIBL. 18 REF.Article

FIELD-PROGRAMMABLE LOGIC, PART 2: SEQUENCERS AND ARRAYS TRANSFORM TRUTH TABLES INTO WORKING SYSTEMS = CIRCUITS LOGIQUES PROGRAMMABLES PAR L'UTILISATEUR. 2EME PARTIE: SEQUENCEURS ET RESEAUX TRANSFORMANT DES TABLES DE VERITE EN SYSTEMES D'EXPLOITATIONCAVLAN N; DURHAM SJ.1979; ELECTRONICS; USA; DA. 1979; VOL. 52; NO 19; PP. 132-139Article

DES CIRCUITS PUISSANTS ET SIMPLES D'EMPLOI: LA FAMILLE DES FPLA ET L'EXPLOITATION PRATIQUE DES CIRCUITSBARRE C.1978; ELECTRON. APPL. INDUSTR.; FRA; DA. 1978; NO 251; PP. 21-25Article

FPLE: DIE MASSGESCHNEIDERTE LOGIK = LES RESEAUX LOGIQUES PROGRAMMABLES: COMPOSANTS LOGIQUES SPECIALISESBOTH J.1980; ELEKTRONIK; DEU; DA. 1980; VOL. 29; NO 7; PP. 53-58; BIBL. 11 REF.Article

GO FROM FLOW CHART TO HARDWARE. THIS APPROACH TO THE DESIGN OF COMPLEX ROM AND PLA LOGIC NETWORKS BYPASSES BOOLEAN EQUATIONS AND TRUTH TABLES.JOHNSON DW.1976; ELECTRON. DESIGN; U.S.A.; DA. 1976; VOL. 24; NO 18; PP. 90-95; BIBL. 2 REF.Article

SCHWANKUNGSERSCHEINUNGEN ALS PRINZIPIELLE UND PRAKTISCHE LEISTUNGSGRENZEN OPTISCHER NACHRICHTENSYSTEME = LES PHENOMENES DE FLUCTUATIONS EN TANT QUE FACTEURS LIMITANT, EN PRINCIPE ET EN PRATIQUE, LA PUISSANCE DE SYSTEMES DE TELECOMMUNICATIONS OPTIQUESGRAU G.1983; AEUE. ARCHIV FUER ELEKTRONIK UND UEBERTRAGUNGSTECHNIK; ISSN 0001-1096; DEU; DA. 1983; VOL. 37; NO 5-6; PP. 137-145; ABS. ENG; BIBL. 16 REF.Article

CHIP-TO-CHIP DRIVER AND RECEIVER CIRCUITS FOR A JOSEPHSON COMPUTERKLEIN M.1982; IEEE JOURNAL OF SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1982; VOL. 17; NO 4; PP. 739-742; BIBL. 11 REF.Article

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