A highly scalable opposite side floating-gate flash memory cellXINNAN LIN; MANSUN CHAN.I.E.E.E. transactions on electron devices. 2005, Vol 52, Num 9, pp 2042-2045, issn 0018-9383, 4 p.Article

Gate resistance modeling- of multifin MOS devicesWEN WU; MANSUN CHAN.IEEE electron device letters. 2006, Vol 27, Num 1, pp 68-70, issn 0741-3106, 3 p.Article

Analysis of geometry-dependent parasitics in multifin double-gate FinFETsWEN WU; MANSUN CHAN.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 4, pp 692-698, issn 0018-9383, 7 p.Article

A 2-bit highly scalable nonvolatile memory cell with two electrically isolated charge trapping sitesTSZ YIN MAN; MANSUN CHAN.Microelectronics and reliability. 2005, Vol 45, Num 2, pp 349-354, issn 0026-2714, 6 p.Article

Comparison of electrical stress-induced charge carrier generation/trapping and related degradation of SiO₂ and HfO₂/SiPO₂ gate dielectric stacksSAMANTA, Piyas; CHUNXIANG ZHU; MANSUN CHAN et al.Microelectronics and reliability. 2010, Vol 50, Num 12, pp 1907-1914, issn 0026-2714, 8 p.Article

A wide-band T/R switch using enhanced compact waffle MOSFETsWEN WU; LAM, Sang; MANSUN CHAN et al.IEEE microwave and wireless components letters. 2006, Vol 16, Num 5, pp 287-289, issn 1531-1309, 3 p.Article

Enhancing deoxyribonucleic acid (DNA) detection sensitivity through microconcentration on patterned fluorocarbon polymer surfaceJIONG LI; YIJIN WANG; ZUHONG LU et al.Analytica chimica acta. 2006, Vol 571, Num 1, pp 34-39, issn 0003-2670, 6 p.Article

Modeling Short-Channel Effect of Elliptical Gate-All-Around MOSFET bv Effective RadiusLINING ZHANG; LIN LI; JIN HE et al.IEEE electron device letters. 2011, Vol 32, Num 9, pp 1188-1190, issn 0741-3106, 3 p.Article

Uniaxial Strain Effects on Electron Ballistic Transport in Gate-All-Around Silicon Nanowire MOSFETsLINING ZHANG; HAIJUN LOU; JIN HE et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 11, pp 3829-3836, issn 0018-9383, 8 p.Article

An air spacer technology for improving short-channel immunity of MOSFETs with raised source/drain and high-κ gate dielectricCHUNSHAN YIN; CHAN, Philip C. H; MANSUN CHAN et al.IEEE electron device letters. 2005, Vol 26, Num 5, pp 323-325, issn 0741-3106, 3 p.Article

Self-align recessed source drain ultrathin body SOI MOSFETZHIKUAN ZHANG; SHENGDONG ZHANG; MANSUN CHAN et al.IEEE electron device letters. 2004, Vol 25, Num 11, pp 740-742, issn 0741-3106, 3 p.Article

An Analytical Charge Model for Double-Gate Tunnel FETsLINING ZHANG; XINNAN LIN; JIN HE et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 12, pp 3217-3223, issn 0018-9383, 7 p.Article

A new analytic method to design multiple floating field limiting rings of power devicesJIN HE; MANSUN CHAN; XING ZHANG et al.Solid-state electronics. 2006, Vol 50, Num 7-8, pp 1375-1381, issn 0038-1101, 7 p.Article

Local clustering 3-D stacked CMOS technology for interconnect loading reductionXINNAN LIN; SHENGDONG ZHANG; XUSHENG WU et al.I.E.E.E. transactions on electron devices. 2006, Vol 53, Num 6, pp 1405-1410, issn 0018-9383, 6 p.Article

Backside-illuminated lateral PIN photodiode for CMOS image sensor on SOS substrateCHEN XU; CHAO SHEN; WEN WU et al.I.E.E.E. transactions on electron devices. 2005, Vol 52, Num 6, pp 1110-1115, issn 0018-9383, 6 p.Article

A physics-based analytic solution to the MOSFET surface potential from accumulation to strong-inversion regionJIN HE; MANSUN CHAN; XING ZHANG et al.I.E.E.E. transactions on electron devices. 2006, Vol 53, Num 9, pp 2008-2016, issn 0018-9383, 9 p.Article

Effects of layout methods of RF CMOS on noise performanceWEN WU; SANG LAM; MANSUN CHAN et al.I.E.E.E. transactions on electron devices. 2005, Vol 52, Num 12, pp 2753-2759, issn 0018-9383, 7 p.Article

Effects of spacer thickness on noise performance of bipolar transistorsLEE, Wai-Kit; SANG LAM; MANSUN CHAN et al.I.E.E.E. transactions on electron devices. 2004, Vol 51, Num 9, pp 1534-1537, issn 0018-9383, 4 p.Article

A Physics Based Analytical Solution to Undoped Cylindrical Surrounding-Gate (SRG) MOSFETsJIN HE; MANSUN CHAN.IEEE International Caracas Conference on Devices, Circuits, and Systems. 2004, pp 26-28, isbn 0-7803-8777-5, 1Vol, 3 p.Conference Paper

Modeling of Mutual Coupling Between Planar Inductors in Wireless Power ApplicationsRAJU, Salahuddin; RONGXIANG WU; MANSUN CHAN et al.IEEE transactions on power electronics. 2014, Vol 29, Num 1, pp 481-490, issn 0885-8993, 10 p.Article

A Non-Charge-Sheet Analytic Model for Symmetric Double-Gate MOSFETs With Smooth Transition Between Partially and Fully Depleted Operation ModesFENG LIU; JIN HE; JIAN ZHANG et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 12, pp 3494-3502, issn 0018-9383, 9 p.Article

Effects of body doping on threshold voltage and channel potential of symmetric DG MOSFETs with continuous solution from accumulation to strong-inversion regionsFENG LIU; LINING ZHANG; JIAN ZHANG et al.Semiconductor science and technology. 2009, Vol 24, Num 8, issn 0268-1242, 095005.1-095005.8Article

Effects of dopants on the electrical behavior of grain boundary in metal-induced crystallized polysilicon filmCHAN, Alain C. K; CHENG, C. F; MANSUN CHAN et al.I.E.E.E. transactions on electron devices. 2005, Vol 52, Num 8, pp 1917-1919, issn 0018-9383, 3 p.Article

Optimization of base-to-emitter spacer thickness to maximize the frequency response of bipolar transistorsLEE, Wai-Kit; CHAN, Alain C. K; MANSUN CHAN et al.Solid-state electronics. 2005, Vol 49, Num 4, pp 554-557, issn 0038-1101, 4 p.Article

An explicit surface-potential-based model for undoped double-gate MOSFETsGONG, Jing-Feng; CHAN, Philip C. H; MANSUN CHAN et al.Solid-state electronics. 2008, Vol 52, Num 2, pp 282-288, issn 0038-1101, 7 p.Article