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A HIGH PERFORMANCE SENSE AMPLIFIER FOR A 5 V DYNAMIC RAMBARNES JJ; CHAN JY.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 5; PP. 831-839; BIBL. 11 REF.Article

THE 64 K DYNAMIC R.A.M.YOUNG S.1980; NEW ELECTRON.; GBR; DA. 1980; VOL. 13; NO 14; PP. 47-48Article

DYNAMIC MEMORIES OFFER ADVANTAGES.WINFIELD J.1977; ELECTRON. DESIGN; U.S.A.; DA. 1977; VOL. 25; NO 14; PP. 66-70; BIBL. 2 REF.Article

DOUBLE LAYER POLYSILICON CELLS FOR HIGH DENSITY RAMSTAGUCHI M; NAKAMURA T.1981; FUJITSU SCI. TECH. J.; ISSN 0016-2523; JPN; DA. 1981; VOL. 17; NO 4; PP. 129-146; BIBL. 14 REF.Article

FULLY BOOSTED 64 K DYNAMIC RAM WITH AUTOMATIC AND SELF-REFRESHTANIGUCHI M; YOSHIHARA T; YAMADA M et al.1981; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1981; VOL. 16; NO 5; PP. 492-495; BIBL. 11 REF.Article

PROPOSED PROCESS MODIFICATIONS FOR DYNAMIC BIPOLAR MEMORY TO REDUCE EMITTER-BASE LEAKAGE CURRENTANTIPOV I.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 714-719; BIBL. 14 REF.Article

A 100 NS 5 V ONLY 64 K X 1 MOS DYNAMIC RAMCHAN JY; BARNES JJ; WANG CY et al.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 5; PP. 839-846; BIBL. 11 REF.Article

SYSTEME D'ELEMENTS DYNAMIQUES D'UNE MEMOIRE ANALOGIQUEBUSSKIJ VI; MALEVICH IA.1976; PRIBORY TEKH. EKSPER.; S.S.S.R.; DA. 1976; NO 3; PP. 86-90; BIBL. 3 REF.Article

MEMOIRE DYNAMIQUEBERDICHEVSKIJ ZM; KAJKOV VN.1976; PRIBORY TEKH. EKSPER.; S.S.S.R.; DA. 1976; NO 3; PP. 80-81; BIBL. 1 REF.Article

A 34 MU M2 DRAM CELL FABRICATED WITH A 1 MU M SINGLE-LEVEL POLYCIDE FET TECHNOLOGYCHAO HH; DENNARD RH; MON YEN TSAI et al.1981; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1981; VOL. 16; NO 5; PP. 499-505; BIBL. 11 REF.Article

A 4K X 8 DYNAMIC RAM WITH SELF-REFRESHREESE EA; SPADERNA DW; FLANNAGAN ST et al.1981; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1981; VOL. 16; NO 5; PP. 479-487; BIBL. 9 REF.Article

AN EXPERIMENTAL STUDY OF THE BO-MOS DYNAMIC RAM CELL = ETUDE EXPERIMENTALE DE LA CELLULE DE MEMOIRE VIVE DYNAMIQUE BO-MOSSAKURAI J.1981; IEEE TRANS. ELECTRON DEVICES; ISSN 0018-9383; USA; DA. 1981; VOL. 28; NO 10; PP. 1178-1182; BIBL. 16 REF.Article

DYNAMISCHE HALBLEITERSPEICHER MIT DREITRANSISTORZELLE = MEMOIRE DYNAMIQUE A SEMICONDUCTEURS UTILISANT UNE CELLULE A TROIS TRANSISTORSJORKE G.1978; RADIO FERNSEHEN ELEKTRON.; DDR; DA. 1978; VOL. 27; NO 10; PP. 649-652; BIBL. 3 REF.Article

TESTING LARGE DYNAMIC MEMORIES.FLANINGAM D.1976; IN: INT. ELECTRON. PACKAG. PROD. CONF. PROC. TECH. PROGRAMME; BRIGHTON, ENGL.; 1976; SURBITON; KIVER COMMUNICATIONS; DA. 1976; PP. 181-186Conference Paper

A LIMITATION OF CHANNEL LENGTH IN DYNAMIC MEMORIESNISHIZAWA JI; OHMI T; HSIAO LIANG CHEN et al.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 4; PP. 705-714; BIBL. 26 REF.Article

A SILICON AND ALUMINIUM DYNAMIC MEMORY TECHNOLOGYLARSEN RA.1980; I.B.M. J. RES. DEVELOP.; USA; DA. 1980; VOL. 24; NO 3; PP. 268-282; BIBL. 49 REF.Article

K DYNAMIC RAN NEEDS ONLY ONE 5-VOLT SUPPLY TO OUTSTRIP 16-K PARTSMOHAN RAO GR; HEWKIN J.1978; ELECTRONICS; USA; DA. 1978; VOL. 51; NO 20; PP. 109-116; BIBL. 7 REF.Article

A DYNAMIC MEMORY WITH FAST RANDOM ACCESS AND PAGE TRANSFER PROPERTIES.KLUGE W.1975; DIGIT. PROCESS.; SWITZ.; DA. 1975; VOL. 1; NO 4; PP. 279-293; ABS. FR. ALLEM.; BIBL. 3 REF.Article

DYNAMIC R.A.M. TESTING IN THE 80 SBROWN D.1980; NEW ELECTRON.; ISSN 0047-9624; GBR; DA. 1980; VOL. 13; NO 20; PP. 140-142; 2 P.Article

SEMICONDUCTOR MEMORIESWILCOCK JD.1980; NEW ELECTRON.; GBR; DA. 1980; VOL. 13; NO 4; PP. 106-113; (5 P.)Article

THE EFFECT OF ALPHA-PARTICLE-INDUCED SOFT ERRORS ON MEMORY SYSTEMS WITH ERROR CORRECTIONNOORLAG DJW; TERMAN LM; KONHEIM AG et al.1980; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 3; PP. 319-325; BIBL. 5 REF.Article

LASER PROGRAMMABLE REDUNDANCY AND YIELD IMPROVEMENT IN A 64 K DRAMSMITH RT; CHLIPALA JD; BINDELS JFM et al.1981; IEEE J. SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1981; VOL. 16; NO 5; PP. 506-514; BIBL. 16 REF.Article

A 5 V-ONLY 64 K DYNAMIC RAM BASED ON HIGH S/N DESIGNMASUDA H; HORI R; KAMIGAKI Y et al.1980; IEEE J. SOLID. STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1980; VOL. 15; NO 5; PP. 846-854; BIBL. 15 REF.Article

DESIGNING LOW NOISE DYNAMIC MEMORY SYSTEMS.CAREY BJ; GROSSMAN HS.1978; ELECTRON. PACKAG. PRODUCT.; USA; DA. 1978; VOL. 18; NO 4; PP. 109-114 (5P.)Article

PROPOSED PROCESS MODIFICATIONS FOR DYNAMIC BIPOLAR MEMORY TO REDUCE EMITTER-BASE LEAKAGE CURRENTANTIPOV I.1980; IEEE TRANS. ELECTRON. DEVICES; ISSN 0018-9383; USA; DA. 1980; VOL. 27; NO 8; PP. 1649-1654; BIBL. 14 REF.Article

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