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Results 1 to 25 of 6682

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A simultaneous access design for idle processor reactivation and the detection of the termination of a parallel activityKAM HOI CHENG; QINGZHOU WANG.Journal of parallel and distributed computing (Print). 1993, Vol 17, Num 4, pp 370-373, issn 0743-7315Article

Alternate resolution strategy in multistage interconnection networksTIEN-YU HUANG; WU, J.-L. C.Parallel computing. 1994, Vol 20, Num 6, pp 887-896, issn 0167-8191Article

Reduction of connections for multibus organizationLANG, T; VALERO, M; FIOL, M. A et al.IEEE transactions on computers. 1983, Vol 32, Num 8, pp 707-716, issn 0018-9340Article

Multiprocessor schemes for solving block tridiagonal linear systemsBERRY, M. W; AHMED SAMEH.The International journal of supercomputer applications. 1988, Vol 2, Num 3, pp 37-57, issn 0890-2720Article

A microprocessor-based multiprocessor system using common memory for communicationHOFFNER, Y.Journal of microcomputer applications. 1983, Vol 6, Num 2, pp 131-140, issn 0745-7138Article

Adressierbare Kopplung mikroprozessorgesteuerter Geräte zu einem Verbundsystem mit zentraler Bedienung = Liaison adressable d'appareils commandés par microprocesseur à un système réticulé à conduite centralisée = Adressable coupling of Microprocesseur - Controlled Devices to a compound system with central controlMICHAELIS, B; HALT, G.Nachrichtentechnik. Elektronik. 1983, Vol 33, Num 9, pp 368-371, issn 0323-4657Article

Hierarchical compilation of macro dataflow graphs for multiprocessors with local memorySRINIVASA PRASANNA, G. N; AGARWAL, A; MUSICUS, B. R et al.IEEE transactions on parallel and distributed systems. 1994, Vol 5, Num 7, pp 720-736, issn 1045-9219Article

Bin packing and multiprocessor scheduling problems with side constraint on job typesMORIHARA, I; IBARAKI, T; HASEGAWA, T et al.Discrete applied mathematics. 1983, Vol 6, Num 2, pp 173-191, issn 0166-218XArticle

Models of access delays in multiprocessor memoriesBUCHER, I. Y; CALAHAN, D. A.IEEE transactions on parallel and distributed systems. 1992, Vol 3, Num 3, pp 270-280Article

A cartesian robot with a modular control system and limited intelligence capabilityBARRIE, P. M; CUNNINGHAM, A; MASS, P et al.Journal of microcomputer applications. 1985, Vol 8, Num 2, pp 109-121, issn 0745-7138Article

Contention delay in distributed priority networksDEL CORSO, D; VERRUA, L.Microprocessing and microprogramming. 1984, Vol 13, Num 1, pp 21-29, issn 0165-6074Article

Development of large general-purpose computing system NEC System 1000SAITO, M; FURUKATSU, T; IZUTANI, Y et al.NEC research & development. 1983, Num 69, pp 9-13, issn 0547-051XArticle

A better algorithm for an ancient scheduling problemKARGER, D. R; PHILLIPS, S. J; TORNG, E et al.Journal of algorithms (Print). 1996, Vol 20, Num 2, pp 400-430, issn 0196-6774Article

Implementierung und Validierung paralleler Algorithmen auf Monorechnern = Implémentation et validation d'algorithmes parallèles sur monoordinateurs = Implementation and validation of Parallel algotithms on monocomputersRATHKE, M.Angewandte Informatik. 1983, Vol 25, Num 8, pp 337-344, issn 0013-5704Article

If Anything in This Life Is Certain, It's That You Can Kill Any ISAMUKHERJEE, Shubu.Computer (Long Beach, CA). 2011, Vol 44, Num 11, pp 87-88, issn 0018-9162, 2 p.Article

Performance of cross-bar multiprocessor systemsSIOMALAS, K. O; BOWEN, B. A.IEEE transactions on computers. 1983, Vol 32, Num 7, pp 689-695, issn 0018-9340Article

The simulation of a master-slave event set processorCOMFORT, J. C.Simulation (San Diego, Calif.). 1984, Vol 42, Num 3, pp 117-124, issn 0037-5497Article

A 32 bit programmable signal processor for a multiprocessor system environmentHESSON, J. H; GALLAGHER, F. A; HARRINGTON, D. R et al.IEEE transactions on acoustics, speech, and signal processing. 1983, Vol 31, Num 4, pp 912-921, issn 0096-3518Article

MN-graph: a tool for monitoring and visualizing MN-based multiprocessor performanceZHANG, X; NALLURI, N. S.Journal of parallel and distributed computing (Print). 1993, Vol 18, Num 2, pp 231-241, issn 0743-7315Article

Parallel block matrix factorizations on the shared-memory multiprocessor IBM 3090 VF/600JDACKLAND, K; ELMROTH, E; KAGSTRÖM, B et al.The International journal of supercomputer applications. 1992, Vol 6, Num 1, pp 69-97, issn 0890-2720Article

A correctness condition for high-performance multiprocessorsATTIYA, H; FRIEDMAN, R.SIAM journal on computing (Print). 1998, Vol 27, Num 6, pp 1637-1670, issn 0097-5397Article

Reliable distributed diagnosis for multiprocessor systems with randoms faultsBERMAN, P; PELC, A.Networks (New York, NY). 1994, Vol 24, Num 8, pp 417-427, issn 0028-3045Article

Fast digit-reversal algorithms on a shared-memory machineSEGUEL, J; BOLLMAN, D.Parallel computing. 1994, Vol 20, Num 1, pp 93-99, issn 0167-8191Article

Multi-microprocessorsSUNDARARAJAN, D; AHMAD, M. O; GANESAN, S et al.IEEE transactions on circuits and systems. 1985, Vol 32, Num 6, pp 620-622, issn 0098-4094Article

Design of a hardware arbiter for multi-microprocessor systemsNELSON, J. C. C; REFAI, M. K.Microprocessors and microsystems. 1984, Vol 8, Num 1, pp 21-24, issn 0141-9331Article

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