Automatic synthesis of self-recovering VLSI systemsORAILOGLU, A; KARRI, R.IEEE transactions on computers. 1996, Vol 45, Num 2, pp 131-142, issn 0018-9340Article

Low-power branch target buffer for application-specific embedded processorsPETROV, P; ORAILOGLU, A.IEE proceedings. Computers and digital techniques. 2005, Vol 152, Num 4, pp 482-488, issn 1350-2387, 7 p.Article

Redundancy and testability in digital filter datapathsGOODBY, L; ORAILOGLU, A.IEEE transactions on computer-aided design of integrated circuits and systems. 1999, Vol 18, Num 5, pp 631-644, issn 0278-0070Article

Standard seven segmented display for Burmese numeralsRAMESH KARRI; ORAILOGLU, A.IEEE transactions on consumer electronics. 1990, Vol 36, Num 4, pp 959-961, issn 0098-3063Article

Microarchitectural synthesis for rapid BIST testingORAILOGLU, A; HARRIS, I. G.IEEE transactions on computer-aided design of integrated circuits and systems. 1997, Vol 16, Num 6, pp 573-586, issn 0278-0070Article

Time-constrained scheduling during high-level synthesis of fault-secure VLSI digital signal processorsKARRI, R; ORAILOGLU, A.IEEE transactions on reliability. 1996, Vol 45, Num 3, pp 404-412, issn 0018-9529Article

Synthesis of fault-tolerance and real-time microarchitecturesORAILOGLU, A; RAMESH KARRI.The Journal of systems and software. 1994, Vol 25, Num 1, pp 73-84, issn 0164-1212Article