Measuring Power Distribution System Resistance VariationsHELINSKI, Ryan; PLUSQUELLIC, Jim.IEEE transactions on semiconductor manufacturing. 2008, Vol 21, Num 3, pp 444-453, issn 0894-6507, 10 p.Article

A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation TimeSALMANI, Hassan; TEHRANIPOOR, Mohammad; PLUSQUELLIC, Jim et al.IEEE transactions on very large scale integration (VLSI) systems. 2012, Vol 20, Num 1, pp 112-125, issn 1063-8210, 14 p.Article

Fault simulation model for i_DDT testing : An investigationSINGH, Abhishek; PATEL, Chintan; PLUSQUELLIC, Jim et al.IEEE VLSI test symposium. 2004, pp 304-310, isbn 0-7695-2134-7, 1Vol, 7 p.Conference Paper

A Sensitivity Analysis of Power Signal Methods for Detecting Hardware Trojans Under Real Process and Environmental ConditionsRAD, Reza; PLUSQUELLIC, Jim; TEHRANIPOOR, Mohammad et al.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 12, pp 1735-1744, issn 1063-8210, 10 p.Article

On-chip impulse response generation for analog and mixed-signal testingSINGH, Abhishek; PATEL, Chintan; PLUSQUELLIC, Jim et al.International Test Conference. 2004, pp 262-270, isbn 0-7803-8580-2, 1Vol, 9 p.Conference Paper

Defect detection under realistic leakage models using multiple I_DDQ measurementsPATEL, Chintan; SINGH, Abhishek; PLUSQUELLIC, Jim et al.International Test Conference. 2004, pp 319-328, isbn 0-7803-8580-2, 1Vol, 10 p.Conference Paper