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Design and programming of logic processors for SIMD arraysDVORAK, V.Computers and artificial intelligence. 1987, Vol 6, Num 2, pp 181-190, issn 0232-0274Article

Parallel sorting with cooperating heaps in a linear array of processorsLIN, Y.-C; LIN, F.-C.Parallel computing. 1990, Vol 16, Num 2-3, pp 273-278, issn 0167-8191, 6 p.Article

An efficient array processor for accurate downdating of ULV decompositionYOON, Peter A; SIBUL, Leon H.SPIE proceedings series. 2001, pp 262-272, isbn 0-8194-4188-0Conference Paper

On time mapping of uniform dependence algorithms into lower dimensional processor arraysWEIJIA SHANG; FORTES, J. A. B.IEEE transactions on parallel and distributed systems. 1992, Vol 3, Num 3, pp 350-363Article

Implementing processor arrays on FPGAsVASSANYI, I.Lecture notes in computer science. 1998, pp 446-450, issn 0302-9743, isbn 3-540-64948-4Conference Paper

Connecting the maximum number of nodes in the grid to the boundary with nonintersecting line segmentsPALIOS, L.Journal of algorithms (Print). 1997, Vol 22, Num 1, pp 57-92, issn 0196-6774Article

Réseaux arithmétiques pour réseaux d'interconnexion = Lattices for interconnection networksGarcia, Christine; Bermond, Jean-Claude.1993, 119 p.Thesis

A design of ABC95 array computer multi-function interconnection ChipsJI ZHENZHOU; ZHANG HONGTAO; FANG BINXING et al.High technology letters. 2002, Vol 8, Num 1, pp 12-16, issn 1006-6748Article

Integer sorting on a mesh-connected array of processorsKRIZANC, D.Information processing letters. 1993, Vol 47, Num 6, pp 283-289, issn 0020-0190Article

Implementation of quadratic digital filters via VLSI array processorsMERTZIOS, B. G; VENETSANOPOULOS, A. N.AEU. Archiv für Elektronik und Übertragungstechnik. 1989, Vol 43, Num 3, pp 153-157, issn 0001-1096, 5 p.Article

Architectural improvements for a Data-Driven VLSI processing arrayWEISS, S; SPILLINGER, I. Y; SILBERMAN, G. M et al.Journal of parallel and distributed computing (Print). 1993, Vol 19, Num 4, pp 308-322, issn 0743-7315Article

Design of multi-dimensional DCT array processors for video applicationsSHIETUNG PENG; SEDUKHIN, S.Lecture notes in computer science. 2000, pp 1086-1094, issn 0302-9743, isbn 3-540-67956-1Conference Paper

The ring array processor : a multiprocessing peripheral for connectionist applicationsMORGAN, N; BECK, J; KOHN, P et al.Journal of parallel and distributed computing (Print). 1992, Vol 14, Num 3, pp 248-259, issn 0743-7315Article

Erweiterte Vektorisierung durch Vektor-Makro- und Vektor-Edit-Befehle = Generalized vectorization using vector instructionsROÊSSIG, S.Informatik (Berlin, West). 1990, Vol 5, Num 2, pp 72-83, issn 0178-3564, 12 p.Article

Optimal decomposition of convex morphological structuring elements for 4-connected parallel array processorsHOCHONG PARK; CHIN, R. T.IEEE transactions on pattern analysis and machine intelligence. 1994, Vol 16, Num 3, pp 304-313, issn 0162-8828Article

Deriving algorithms on reconfigurable networks based on function decompositionGEN-HUEY CHEN; BIING-FENG WANG; HUNGWEN LI et al.Theoretical computer science. 1993, Vol 120, Num 2, pp 215-227, issn 0304-3975Article

Efficient processor allocation strategies for mesh-connected parallel computersYAHUI ZHU.Journal of parallel and distributed computing (Print). 1992, Vol 16, Num 4, pp 328-337, issn 0743-7315Article

A guide to sorting on the mesh-connected processor arrayCHLEBUS, B. S; KUKAWKA, M.Computers and artificial intelligence. 1990, Vol 9, Num 6, pp 599-610, issn 0232-0274, 12 p.Article

Digital convolution filtering techniques on an array processor for particle image velocimetryGRANT, I; JIAN HANG QIU.Applied optics. 1990, Vol 29, Num 29, pp 4327-4329, issn 0003-6935Article

Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arraysERDÖS, P; KOREN, I; MORAN, S et al.Mathematical systems theory. 1988, Vol 21, Num 2, pp 85-98, issn 0025-5661Article

A shape coding arrayWOJCIK, Z. M; ROSENFELD, A.Pattern recognition letters. 1986, Vol 4, Num 1, pp 57-59, issn 0167-8655Article

An approach to fast arrays in HaskellCHAKRAVARTY, Manuel M. T; KELLER, Gabriele.Lecture notes in computer science. 2003, pp 27-58, issn 0302-9743, isbn 3-540-40132-6, 32 p.Conference Paper

Application of a Dynamically Reconfigurable Cell-Array Processor to an MPEG-2 video decoderKOMOKU, Kiyotaka; HATANO, Fumihiro; MORISHITA, Takayuki et al.SPIE proceedings series. 2002, pp 42-49, isbn 0-8194-3877-4Conference Paper

Efficient processor arrays for the implementation of the generalised predictive-control algorithmKARAGIANNI, K; CHRONOPOULOS, T; TZES, A et al.IEE proceedings. Control theory and applications. 1998, Vol 145, Num 1, pp 47-54, issn 1350-2379Article

Recursive folding for efficiency improvement of systolic arrays. Part 1OKSA, G; EVANS, D. J.International journal of computer mathematics. 1996, Vol 61, Num 1-2, pp 29-47, issn 0020-7160Article

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