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Optical implementations of associative networks with versatile adaptive learning capabilitiesFISHER, A. D; LIPPINCOTT, W. L; LEE, J. N et al.Applied optics. 1987, Vol 26, Num 23, pp 5039-5054, issn 0003-6935Article

Second-generation RISC floating point with multiply-add fusedHOKENEK, E; MONTOYE, R. K; COOK, P. W et al.IEEE journal of solid-state circuits. 1990, Vol 25, Num 5, pp 1207-1213, issn 0018-9200, 7 p.Article

An implementation of a 16 bit processor using only 600 transistorsSHUTE, M. J.Microelectronics. 1984, Vol 15, Num 5, pp 37-47, issn 0026-2692Article

Système d'évaluation du processeur de traitement du signal MUPTS = Evaluation system of MUPTS signal processing processorARNDT, M.1984, 59 p.Report

Microprogrammable pipelined vector processorMADESWARAN, V; MATHIALAGAN, A.Computers in industry. 1990, Vol 13, Num 4, pp 367-370, issn 0166-3615Article

NEW ANALOGUE PROCESSOR USING DIGITAL CIRCUITSTAHA SMR; ABDUL KARIM MAH.1982; INT. J. ELECTRON. THEOR. EXP.; ISSN 0020-7217; GBR; DA. 1982; VOL. 52; NO 5; PP. 455-461Article

MULTIFUNCTION ADAPTIVE PROCESSOR FOR SMALL ANTENNA ARRAYSSEARLE JG; WARD CR.1983; IEE PROCEEDINGS. PART F. COMMUNICATIONS, RADAR AND SIGNAL PROCESSING; ISSN 0143-7070; GBR; DA. 1983; VOL. 130; NO 1; PP. 57-62; BIBL. 7 REF.Article

Experiences with writing library software for an attached processorPRYCE, J. D.Software, practice & experience. 1985, Vol 15, Num 7, pp 705-714, issn 0038-0644Article

Calcul de transformée de Fourier discréte à l'aide d'un processeur matriciel cellulaire = Discrète Fourier transformation calculus with a cellular matrix processorCOTTON, J. M; MASTERSON, G. E.Revue des Télécommunications. 1985, Vol 59, Num 3, pp 306-311, issn 0373-8582Article

Modular data flow image processorIWASHITA, M; TEMMA, T; MATSUMOTO, K et al.NEC research & development. 1984, Num 74, pp 92-98, issn 0547-051XArticle

Radix-2n multiplier structures: a structured design methodologyIBRAHIM, M. K.IEE proceedings. Part E. Computers and digital techniques. 1993, Vol 140, Num 4, pp 185-190, issn 0143-7062Article

Memoryless pipelined trigonometric processorSHAOUT, A; VIERGEVER, T.Electronics Letters. 1992, Vol 28, Num 16, pp 1507-1508, issn 0013-5194Article

On the effective bandwith of interleaved memories in vector processor systemsOED, W; LANGE, O.IEEE transactions on computers. 1985, Vol 34, Num 10, pp 949-957, issn 0018-9340Article

Block adjustment with array and vector processors = Compensation par bloc avec processeurs vectoriel et à tableauBAZ, I; METHLEY, B. D. F.Photogrammetric Record. 1985, Vol 11, Num 65, pp 543-566, issn 0031-868XConference Paper

An 8-bit multitask micropower RISC corePEROTTO, J.-F; LAMOTHE, C; ARM, C et al.IEEE journal of solid-state circuits. 1994, Vol 29, Num 8, pp 986-991, issn 0018-9200Article

The supercomputer FACOM VP systemTAMURA, H; SHINKAI, Y; ISOBE, F et al.Fujitsu scientific and technical journal. 1985, Vol 21, Num 1, pp 90-108, issn 0016-2523Article

Cutting-Edge Computing: Using New Commodity ArchitecturesLIN, M. C; MANOCHA, D.Proceedings of the IEEE. 2008, Vol 96, Num 5, issn 0018-9219, 153 p.Serial Issue

Systolic time-integrating acoustooptic binary processorGOUTZOULIS, A. P.Applied optics. 1984, Vol 23, Num 22, pp 4095-4099, issn 0003-6935Article

Microcode optimization for the PCS processor; Optimisation de microcode pour le processeur PCSBODIN, François; CHAROT, François; WAGNER, Charles et al.Rapports de recherche - INRIA. 1989, Vol 1050, issn 0249-6399, 26 p.Report

OPTIMAL SCHEDULING FOR TWO-PROCESSOR SYSTEMS = ORDONNANCEMENT OPTIMAL POUR SYSTEMES A DEUX PROCESSEURSCOFFMAN EG JR; GRAHAM RL.1972; ACTA INFORMAT.; ALLEM.; DA. 1972; VOL. 1; NO 3; PP. 200-213; BIBL. 11 REF.Serial Issue

A variable delay line PLL for CPU-coprocessor synchronizationJOHNSON, M. G; HUDSON, E. L.IEEE journal of solid-state circuits. 1988, Vol 23, Num 5, pp 1218-1223, issn 0018-9200Article

Étude du découplage dans les processeurs superscalaires = A study on decoupling in superscalar processorsBosch Vivancos, Pablo; Etiemble, Daniel.2000, 152 p.Thesis

PROCESSEUR FRONTAL POUR TRANSMISSION DE DONNEESGRIFFIN RH.1980; REV. TELECOMMUN.; ISSN 0373-8582; FRA; DA. 1980; VOL. 55; NO 2; PP. 104-109Article

Constant time algorithm for template matching on a reconfigurable array of processorsHORNG, S. J.Computer journal (Print). 1993, Vol 36, Num 3, pp 246-253, issn 0010-4620Article

Pipelined parallel prefix computations, and sorting on a pipelined hypercubeMAYR, E. W; PLAXTON, C. G.Journal of parallel and distributed computing (Print). 1993, Vol 17, Num 4, pp 374-380, issn 0743-7315Article

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