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Microfabrication-based nanomechanical laboratory for testing the ductility of submicron aluminium filmsANDRE, N; COULOMBIER, M; DE LONGUEVILLE, V et al.Microelectronic engineering. 2007, Vol 84, Num 11, pp 2714-2718, issn 0167-9317, 5 p.Conference Paper

Investigation of charge control related performances in double-gate SOI MOSFETsKILCHYTSKA, V; CHUNG, T. M; VAN MEER, H et al.Proceedings - Electrochemical Society. 2003, pp 225-230, issn 0161-6374, isbn 1-56677-375-X, 6 p.Conference Paper

Direct extraction of the series equivalent circuit parameters for the small-signal model of SOI MOSFET'sRASKIN, J. P; DAMBRINE, G; GILLON, R et al.IEEE microwave and guided wave letters. 1997, Vol 7, Num 12, pp 408-410, issn 1051-8207Article

Une nouvelle méthode d'extraction directe des paramètres petits signaux d'un transistor à effet de champ, applications aux MOSFET SOI = A novel method for direct small signal parameter extraction of a field effect transistor, applied to SOI MOSFETRASKIN, J.-P; DAMBRINE, G.Journées nationales microondes. 1997, pp 586-587, 2VolConference Paper

On the g_m/I_D-based approaches for threshold voltage extraction in advanced MOSFETs and their application to ultra-thin body SOI MOSFETsRUDENKO, T; MD ARSHAD, M. K; RASKIN, J.-P et al.Solid-state electronics. 2014, Vol 97, pp 52-58, issn 0038-1101, 7 p.Article

Ultra-thin body and thin-BOX SOI CMOS technology analog figures of meritKILCHYTSKA, V; MD ARSHAD, M. K; MAKOVEJEV, S et al.Solid-state electronics. 2012, Vol 70, pp 50-58, issn 0038-1101, 9 p.Conference Paper

Preconcentrator-based sensor μ-system for low-level benzene detectioneIVANOV, P; GRACIA, I; SANTANDER, J et al.Proceedings of SPIE, the International Society for Optical Engineering. 2008, Vol 7268, issn 0277-786X, isbn 9780819475206, 72680S.1-72680S.8Conference Paper

On the origin of the excess low-frequency noise in graded-channel silicon-on-insulator nMOSFETsSIMOEN, Eddy; CLAEYS, C; CHUNG, T. M et al.IEEE electron device letters. 2007, Vol 28, Num 10, pp 919-921, issn 0741-3106, 3 p.Article

Planar double-gate SOI MOS devices : Fabrication by wafer bonding over pre-patterned cavities and electrical characterizationCHUNG, T. M; OLBRECHTS, B; SODERVALL, U et al.Solid-state electronics. 2007, Vol 51, Num 2, pp 231-238, issn 0038-1101, 8 p.Conference Paper

The low-frequency noise behaviour of graded-channel SOI nMOSFETsSIMOEN, E; CLAEYS, C; CHUNG, T. M et al.Solid-state electronics. 2007, Vol 51, Num 2, pp 260-267, issn 0038-1101, 8 p.Conference Paper

Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applicationsSI MOUSSA, M; PAVAGEAU, C; LEDERER, D et al.Solid-state electronics. 2006, Vol 50, Num 11-12, pp 1822-1827, issn 0038-1101, 6 p.Article

Small-and large-signal RF characterization of fully-depleted accumulation-mode varactors for low-voltage LC-VCO SOI designPARVAIS, B; DELATTE, P; MATSUHASHI, H et al.IEEE international SOI conference. 2004, pp 168-170, isbn 0-7803-8497-0, 1Vol, 3 p.Conference Paper

Operation of double gate graded-channel transistors at low temperaturesPAVANELLO, M. A; MARTINO, J. A; CHUNG, T. M et al.Proceedings - Electrochemical Society. 2003, pp 50-60, issn 0161-6374, isbn 1-56677-412-8, 11 p.Conference Paper

Figures-of-merit of intrinsic, standard-doped and graded-channel SOI and SOS mosfets for analog baseband and RF applicationsLEVACQ, D; DEHAN, M; FLANDRE, D et al.Proceedings - Electrochemical Society. 2003, pp 295-300, issn 0161-6374, isbn 1-56677-375-X, 6 p.Conference Paper

Inter- and intragranular plasticity mechanisms in ultrafine-grained Al thin films: An in situ TEM studyMOMPIOU, F; LEGROS, M; BOE, A et al.Acta materialia. 2013, Vol 61, Num 1, pp 205-216, issn 1359-6454, 12 p.Article

Impact of self-heating and substrate effects on small-signal output conductance in UTBB SOI MOSFETsMAKOVEJEV, S; RASKIN, J.-P; ARSHAD, M. K. Md et al.Solid-state electronics. 2012, Vol 71, pp 93-100, issn 0038-1101, 8 p.Conference Paper

Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layerRODA NEVE, C; KILCHYTSKA, V; ALVARADO, J et al.Microelectronics and reliability. 2011, Vol 51, Num 2, pp 326-331, issn 0026-2714, 6 p.Article

Silicon-on-Nothing MOSFETs : An efficient solution for parasitic substrate coupling suppression in SOI devicesKILCHYTSKA, V; FLANDRE, D; RASKIN, J.-P et al.Applied surface science. 2008, Vol 254, Num 19, pp 6168-6173, issn 0169-4332, 6 p.Conference Paper

Temperature behavior of spiral inductors on high resistivity substrate in SOI CMOS technologyEL KAAMOUCHI, M; DELATTE, P; SI MOUSSA, M et al.Solid-state electronics. 2008, Vol 52, Num 12, pp 1915-1923, issn 0038-1101, 9 p.Conference Paper

FinFET analogue characterization from DC to 110 GHzLEDERER, D; KILCHYTSKA, V; RUDENKO, T et al.Solid-state electronics. 2005, Vol 49, Num 9, pp 1488-1496, issn 0038-1101, 9 p.Article

Opto-electronic control of coplanar transmission lines up to 110 GHzSTIENS, J; POESEN, G; KOERS, G et al.SPIE proceedings series. 2004, pp 101-108, isbn 0-8194-5389-7, 8 p.Conference Paper

Partially depleted SOI dynamic threshold MOSFET for low-voltage and microwave applicationsDEBAN, M; VANHOENACKER-JANVIER, D; RASKIN, J.-P et al.Proceedings - Electrochemical Society. 2003, pp 289-294, issn 0161-6374, isbn 1-56677-375-X, 6 p.Conference Paper

Substrate effects on the small-signal characteristics of SOI MOSFETsKILCHYTSKA, V; LEVACQ, D; LEDERER, D et al.ESSCIRC 2002 : European solid-state circuits conferenceEuropean solid-state device research conference. 2002, pp 519-522, isbn 88-900847-8-2, 4 p.Conference Paper

Effect of temperature on advanced Si-based substrates performance for RF passive integrationNEVE, C. Roda; BEN ALI, K; SARAFIS, P et al.Microelectronic engineering. 2014, Vol 120, pp 205-209, issn 0167-9317, 5 p.Conference Paper