Diffusion of renewable energy technologies: barriers and stakeholders' perspectivesREDDY, Sudhakar; PAINULY, J. P.Renewable energy. 2004, Vol 29, Num 9, pp 1431-1447, issn 0960-1481, 17 p.Article

Design-for-testability to achieve complete coverage of delay faults in standard full scan circuitsPOMERANZ, Irith; REDDY, Sudhakar M.Journal of systems architecture. 2001, Vol 47, Num 3-4, pp 357-373, issn 1383-7621Article

Test Strength: A Quality Metric for Transition Fault Tests in Full-Scan CircuitsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2011, Vol 19, Num 10, pp 1907-1911, issn 1063-8210, 5 p.Article

Transparent-Segmented-Scan without the Routing Overhead of Segmented-ScanPOMERANZ, Irith; REDDY, Sudhakar M.Journal of low power electronics (Print). 2011, Vol 7, Num 2, pp 245-253, issn 1546-1998, 9 p.Article

Hazard-Based Detection Conditions for Improved Transition Fault Coverage of Scan-Based TestsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 2, pp 333-337, issn 1063-8210, 5 p.Article

Functional Broadside Tests with Minimum and Maximum Switching ActivityPOMERANZ, Irith; REDDY, Sudhakar M.Journal of low power electronics (Print). 2008, Vol 4, Num 3, pp 429-437, issn 1546-1998, 9 p.Article

A built-in self-test method for diagnosis of synchronous sequential circuitsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2001, Vol 9, Num 2, pp 290-296, issn 1063-8210Article

Reducing the Storage Requirements of a Test Sequence by Using One or Two Background VectorsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2011, Vol 19, Num 10, pp 1755-1764, issn 1063-8210, 10 p.Article

Selection of a Fault Model for Fault Diagnosis Based on Unique ResponsesPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 11, pp 1533-1543, issn 1063-8210, 11 p.Article

Improving the stuck-at fault coverage of functional test sequences by using limited-scan operationsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2004, Vol 12, Num 7, pp 780-788, issn 1063-8210, 9 p.Article

Input Necessary Assignments for Testing of Path Delay Faults in Standard-Scan CircuitsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2011, Vol 19, Num 2, pp 333-337, issn 1063-8210, 5 p.Article

Path Selection for Transition Path Delay FaultsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2010, Vol 18, Num 3, pp 401-409, issn 1063-8210, 9 p.Article

Autoscan : A scan design without external scan inputs or outputsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2005, Vol 13, Num 9, pp 1087-1095, issn 1063-8210, 9 p.Article

Resynthesis of combinational logic circuits for improved path delay fault testability using comparison unitsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE transactions on very large scale integration (VLSI) systems. 2001, Vol 9, Num 5, pp 679-689, issn 1063-8210Article

Properties of maximally dominating faultsPOMERANZ, Irith; REDDY, Sudhakar M.Asian test symposium. 2004, pp 106-111, isbn 0-7695-2235-1, 1Vol, 6 p.Conference Paper

A postprocessing procedure of test enrichment for path delay faultsPOMERANZ, Irith; REDDY, Sudhakar M.Asian test symposium. 2004, pp 448-453, isbn 0-7695-2235-1, 1Vol, 6 p.Conference Paper

On undetectable faults in partial scan circuitsPOMERANZ, Irith; REDDY, Sudhakar M.Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design. 2002, pp 82-86, issn 1092-3152, isbn 0-7803-7607-2, 5 p.Conference Paper

Weighted pseudo-random BIST for N-detection of single stuck-at faultsCHAOWEN YU; REDDY, Sudhakar M; POMERANZ, Irith et al.Asian test symposium. 2004, pp 178-183, isbn 0-7695-2235-1, 1Vol, 6 p.Conference Paper

Tacrolimus-based immunosuppression with steroid withdrawal in pediatric kidney transplantation: 4-year experience at a moderate-volume centerJENSEN, Sena; JACKSON, Elizabeth Connor; RILEY, Lena et al.Pediatric transplantation. 2003, Vol 7, Num 2, pp 119-124, issn 1397-3142, 6 p.Article

Planning sensing actions for UAVs in urban domainsPEOT, Mark A; ALTSHULER, Thomas W; BREIHOLZ, Arlen et al.Proceedings of SPIE, the International Society for Optical Engineering. 2005, pp 59860J.1-59860J.10, issn 0277-786X, isbn 0-8194-6008-7, 1VolConference Paper

On Detection of Bridge Defects with Stuck-at Tests : Test and verification of VLSIsMIYASE, Kohei; TERASHIMA, Kenta; WEN, Xiaoqing et al.IEICE transactions on information and systems. 2008, Vol 91, Num 3, pp 683-689, issn 0916-8532, 7 p.Article

On interconnecting circuits with multiple scan chains for improved test data compressionPOMERANZ, Irith; REDDY, Sudhakar M.International Conference on Embedded Systems DesignInternational Conference on VLSI Design. 2004, pp 741-744, isbn 0-7695-2072-3, 1Vol, 4 p.Conference Paper

On the coverage of delay faults in scan designs with multiple scan chainsPOMERANZ, Irith; REDDY, Sudhakar M.Proceedings, IEEE International Conference on Computer Design. 2002, pp 206-209, issn 1063-6404, isbn 0-7695-1700-5, 4 p.Conference Paper

Concurrent on-line testing of identical circuits through output comparison using non-identical input vectorsPOMERANZ, Irith; REDDY, Sudhakar M.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 469-476, isbn 0-7695-2241-6, 1Vol, 8 p.Conference Paper

Pseudo random patterns using markov sources for scan BISTBASTURKMEN, Nadir Z; REDDY, Sudhakar M; POMERANZ, Irith et al.Proceedings - International Test Conference. 2002, pp 1013-1021, issn 1089-3539, isbn 0-7803-7542-4, 9 p.Conference Paper