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A SYSTEMATICALLY DESIGNED BINARY ARRAY PROCESSORREEVES AP.1980; I.E.E.E. TRANS. COMPUTERS; USA; DA. 1980; VOL. 29; NO 4; PP. 278-287; BIBL. 13 REF.Article

THE LOCAL MEDIAN AND OTHER WINDOW OPERATIONS ON SIMD COMPUTERSREEVES AP.1982; COMPUT. GRAPH. IMAGE PROCESS.; ISSN 0146-664X; USA; DA. 1982; VOL. 19; NO 2; PP. 165-178; BIBL. 9 REF.Article

PARALLEL COMPUTER ARCHITECTURES FOR IMAGE PROCESSINGREEVES AP.1981; INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING/1981/BELLAIRE OH; USA; NEW YORK: INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS; DA. 1981; PP. 199-206; BIBL. 44 REF.Conference Paper

AN ARRAY PROCESSING SYSTEM WITH A FORTRAN-BASED REALIZATIONREEVES AP.1979; COMPUTER GRAPH. IMAGE PROCESSG; USA; DA. 1979; VOL. 9; NO 3; PP. 267-281; BIBL. 6 REF.Article

COMPUTER ARCHITECTURES FOR IMAGE PROCESSING IN THE USAREEVES AP.1981; SIGNAL PROCESS.; ISSN 0165-1684; NLD; DA. 1981; VOL. 3; NO 3; PP. 217-230; ABS. GER/FRE; BIBL. 42 REF.Article

COMPUTATIONAL COST OF IMAGE REGISTRATION WITH A PARALLEL BINARY ARRAY PROCESSORREEVES AP; ROSTAMPOUR A.1982; IEEE TRANS. PATTERN ANAL. MACH. INTELL.; ISSN 0162-8828; USA; DA. 1982; VOL. 4; NO 4; PP. 449-455; BIBL. 16 REF.Article

EFFICIENT FUNCTION IMPLEMENTATION FOR BIT-SERIAL PARALLEL PROCESSORSREEVES AP; BRUNER JD.1980; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1980; VOL. 29; NO 9; PP. 841-844; BIBL. 12 REF.Article

THE BASE 8 BINARY ARRAY PROCESSORREEVES AP; RINDFUSS R.1979; PATTERN RECOGNITION AND IMAGE PROCESSING. INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS COMPUTER SOCIETY. CONFERENCE ON PATTERN RECOGNITION AND IMAGE PROCESSING/1979/CHICAGO IL; USA; NEW YORK: IEEE; DA. 1979; PP. 250-255; BIBL. 5 REF.Conference Paper

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