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Results 1 to 25 of 76

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Three-dimensional level set based Bosch process simulations using ray tracing for flux calculationERTL, Otmar; SELBERHERR, Siegfried.Microelectronic engineering. 2010, Vol 87, Num 1, pp 20-29, issn 0167-9317, 10 p.Article

THE STATE OF COMPUTATIONAL ELECTRONICS IN EUROPEKOSINA, Hans; SELBERHERR, Siegfried.Journal of computational electronics (Print). 2009, Vol 8, Num 3-4, issn 1569-8025, 280 p.Serial Issue

Analysis of high speed heterostructure devicesPALANKOVSKI, Vassil; SELBERHERR, Siegfried.International conference on microelectronics. 2004, isbn 0-7803-8166-1, 2Vol, vol 1, 115-122Conference Paper

An extensible TCAD optimization framework combining gradient based and genetic optimizersHEITZINGER, Clemens; SELBERHERR, Siegfried.Microelectronics journal. 2002, Vol 33, Num 1-2, pp 61-68, issn 0959-8324Article

A method for simulating Atomic Force Microscope nanolithography in the Level Set frameworkFILIPOVIC, Lado; SELBERHERR, Siegfried.Microelectronic engineering. 2013, Vol 107, pp 23-32, issn 0167-9317, 10 p.Article

On the simulation of the formation and dissolution of silicon self-interstitial clusters and the corresponding inverse modeling problemHEITZINGER, Clemens; SELBERHERR, Siegfried.Microelectronics journal. 2004, Vol 35, Num 2, pp 167-171, issn 0959-8324, 5 p.Article

The Economic Limit to Moore's LawRUPP, Karl; SELBERHERR, Siegfried.IEEE transactions on semiconductor manufacturing. 2011, Vol 24, Num 1, pp 1-4, issn 0894-6507, 4 p.Article

Cavity Model for the Slot Radiation of an Enclosure Excited by Printed Circuit Board Traces With Different LoadsPOSCHALKO, Christian; SELBERHERR, Siegfried.IEEE transactions on electromagnetic compatibility. 2009, Vol 51, Num 1, pp 18-24, issn 0018-9375, 7 p.Article

Perspectives of Silicon for Future Spintronic Applications From the Peculiarities of the Subband Structure in Thin FilmsBAUMGARTNER, Oskar; SVERDLOV, Viktor; WINDBACHER, Thomas et al.IEEE transactions on nanotechnology. 2011, Vol 10, Num 4, pp 737-743, issn 1536-125X, 7 p.Article

Reliability Analysis and Comparison of Implication and Reprogrammable Logic Gates in Magnetic Tunnel Junction Logic CircuitsMAHMOUDI, Hiwa; WINDBACHER, Thomas; SVERDLOV, Viktor et al.IEEE transactions on magnetics. 2013, Vol 49, Num 12, pp 5620-5628, issn 0018-9464, 9 p.Article

Stochastic modeling of bipolar resistive switching in metal-oxide based memory by Monte Carlo techniqueMAKAROV, Alexander; SVERDLOV, Viktor; SELBERHERR, Siegfried et al.Journal of computational electronics (Print). 2010, Vol 9, Num 3-4, pp 146-152, issn 1569-8025, 7 p.Article

Computational study of carbon-based electronicsPOURFATH, Mahdi; KOSINA, Hans.Journal of computational electronics (Print). 2009, Vol 8, Num 3-4, pp 427-440, issn 1569-8025, 14 p.Article

Efficient inductance calculation in interconnect structures by applying the Monte Carlo methodHARLANDER, Christian; SABELKA, Rainer; SELBERHERR, Siegfried et al.Microelectronics journal. 2003, Vol 34, Num 9, pp 815-821, issn 0959-8324, 7 p.Article

Interconnect reliability dependence on fast diffusivity pathsCERIC, Hajdin; DE ORIO, Roberto Lacerda; SELBERHERR, Siegfried et al.Microelectronics and reliability. 2012, Vol 52, Num 8, pp 1532-1538, issn 0026-2714, 7 p.Conference Paper

Nanowire transistor modeling: influence of ionized impurity and correlation effectsBESCOND, Marc; CHANGSHENG LI; LANNOO, Michel et al.Journal of computational electronics (Print). 2009, Vol 8, Num 3-4, pp 382-388, issn 1569-8025, 7 p.Article

Electron subband structure in strained silicon UTB films from the Hensel-Hasegawa-Nakayama model - Part 1 analytical consideration and strain-induced valley splittingWINDBACHER, Thomas; SVERDLOV, Viktor; BAUMGARTNER, Oskar et al.Solid-state electronics. 2010, Vol 54, Num 2, pp 137-142, issn 0038-1101, 6 p.Article

Modeling of circuits and architectures for molecular electronicsLUGLI, Paolo; CSABA, Gyorgy; ERLEN, Christoph et al.Journal of computational electronics (Print). 2009, Vol 8, Num 3-4, pp 410-426, issn 1569-8025, 17 p.Article

Three-dimensional simulation of sacrificial etchingCERVENKA, Johann; CERIC, Hajdin; SELBERHERR, Siegfried et al.Microsystem technologies. 2008, Vol 14, Num 4-5, pp 665-671, issn 0946-7076, 7 p.Conference Paper

Optimization of the perfectly matched layer for the finite-element time-domain methodMOVAHHEDI, Masoud; ABDIPOUR, Abdolali; CERIC, Hajdin et al.IEEE microwave and wireless components letters. 2007, Vol 17, Num 1, pp 10-12, issn 1531-1309, 3 p.Article

A review of hydrodynamic and energy-transport models for semiconductor device simulationGRASSER, Tibor; TANG, Ting-Wei; KOSINA, Hans et al.Proceedings of the IEEE. 2003, Vol 91, Num 2, pp 251-274, issn 0018-9219, 24 p.Article

Quantum transport including nonparabolicity and phonon scattering: application to silicon nanowiresESPOSITO, Aniello; FREY, Martin; SCHENK, Andreas et al.Journal of computational electronics (Print). 2009, Vol 8, Num 3-4, pp 336-348, issn 1569-8025, 13 p.Article

A fully coupled scheme for a Boltzmann-Poisson equation solver based on a spherical harmonics expansionHONG, S.-M; JUNGEMANN, C.Journal of computational electronics (Print). 2009, Vol 8, Num 3-4, pp 225-241, issn 1569-8025, 17 p.Article

A Numerical Study of Line-Edge Roughness Scattering in Graphene NanoribbonsYAZDANPANAH, Arash; POURFATH, Mahdi; FATHIPOUR, Morteza et al.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 2, pp 433-440, issn 0018-9383, 8 p.Article

Electron subband structure and controlled valley splitting in silicon thin-body SOI FETs : Two-band k p theory and beyondSVERDLOV, Viktor; SELBERHERR, Siegfried.Solid-state electronics. 2008, Vol 52, Num 12, pp 1861-1866, issn 0038-1101, 6 p.Conference Paper

The effects of etching and deposition on the performance and stress evolution of open through silicon viasFILIPOVIC, Lado; SELBERHERR, Siegfried.Microelectronics and reliability. 2014, Vol 54, Num 9-10, pp 1953-1958, issn 0026-2714, 6 p.Conference Paper

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