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DOUBLE-EDGE-TRIGGERED FLIP-FLOPSUNGER SH.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 6; PP. 447-452; BIBL. 6 REF.Article

NEGATIVE FAILSAFE SEQUENTIAL CIRCUITSGAITANIS N; HALATSIS C.1980; ELECTRON. LETTERS; GBR; DA. 1980; VOL. 16; NO 16; PP. 615-617; BIBL. 8 REF.Article

CRITERIO DE COSTE PARA LA MINIMIZACION DE CIRCUITOS SECUENCIALES EMPLEANDO ELEMENTOS MODULARES. = COUT DE LA MINIMISATION DE CIRCUITS SEQUENTIELS EMPLOYANT DES MODULES ELEMENTAIRESHUERTAS JL; CIVIT A.1977; AN. FIS.; ESP; DA. 1977; VOL. 73; NO 3; PP. 191-194; ABS. ENG; BIBL. 7 REF.Article

AN ALGORITHM FOR THE STATE ASSIGNMENT OF SYNCHRONOUS SEQUENTIAL CIRCUITS.LALA PK.1978; ELECTRON. LETTERS; G.B.; DA. 1978; VOL. 14; NO 6; PP. 199-201; BIBL. 3 REF.Article

SEQUENTIELLER DIGITALWERTKOMPARATOR = COMPARATEUR NUMERIQUE SEQUENTIELSTEINHAGEN H.1979; RADIO FERNSCHEN ELEKTRON.; DDR; DA. 1979; VOL. 28; NO 5; PP. 299-300; BIBL. 9 REF.Article

COMPTEURS AVEC FACTEUR DE DEMULTIPLICATION CONTROLABLESHNYREV EF; MAMIS AF.1982; PRIB. TEH. EKSP.; ISSN 0032-8162; SUN; DA. 1982; NO 3; PP. 81-83; BIBL. 3 REF.Article

AUTOMATISMES SEQUENTIELS: LA SYNTHESE PAR LE GRAFCETBROCHET P; LOPEZ P.1980; AUTOMAT. INFORMAT. INDUSTR.; FRA; DA. 1980; NO 83; PP. 19-27; BIBL. 14 REF.Article

EFFICIENCY OF COMPACT TESTING FOR SEQUENTIAL CIRCUITS.LOSQ J.1977; IN: FTCS-7. ANNU. INT. CONF. FAULT-TOLERANT COMPUT. 7; LOS ANGELES; 1977; NEW YORK; INST. ELECTR. ELECTRON. ENG.; DA. 1977; PP. 168-174; BIBL. 23 REF.Conference Paper

AUTOTESTING SPEED-INDEPENDENT SEQUENTIAL CIRCUITSCIOFFI G.1978; I.E.E.E. TRANS. COMPUTERS; USA; DA. 1978; VOL. 27; NO 1; PP. 90-94; BIBL. 15 REF.Article

PRACTICAL APPROACH TO ASYNCHRONOUS GATE NETWORKS.BRZOZOWSKI JA; YOELI M.1976; PROC. INSTIT. ELECTR. ENGRS; G.B.; DA. 1976; VOL. 123; NO 6; PP. 495-498; BIBL. 6 REF.Article

HARDWARE-EFFICIENT BIT SEQUENTIAL ADDERS AND MULTIPLIERS USING-MODE-CONTROLLED LOGICDAWS DC; JONES EV.1980; ELECTRON. LETTERS; GBR; DA. 1980; VOL. 16; NO 11; PP. 434-436; BIBL. 3 REF.Article

LOGIC DESIGN-V.HOLDSWORTH B; ZISSOS D.1977; WIRELESS WORLD; G.B.; DA. 1977; VOL. 83; NO 1498; PP. 52-55Article

DIGITAL SEQUENCERS.YONG A.1977; DIGIT. DESIGN; U.S.A.; DA. 1977; VOL. 7; NO 5; PP. 74-78 (4P.); BIBL. 9 REF.Article

UNIVERSAL PRESET TESTS OF SEQUENTIAL CIRCUITS.PAYAN C; SIFAKIS J.1976; IN: F.T.C.S. 6. 1976 INT. SYMP. FAULT-TOLERANT COMPUT.; PITTSBURGH, PA.; 1976; LONG BEACH; INST. ELECTR. ELECTRON. ENG.; DA. 1976; PP. 75-79; BIBL. 14 REF.Conference Paper

STATE ASSIGNMENT AND ENTROPY.EDWARDS CR; ERIS E.1978; ELECTRON. LETTERS; GBR; DA. 1978; VOL. 14; NO 13; PP. 390-391; BIBL. 7 REF.Article

ADAPTATION D'UNE METHODE SEQUENTIELLE ORDONNEE DE DETECTIONAKIMOV PS; EFREMOV VS.1977; RADIOTEKH. I ELEKTRON.; S.S.S.R.; DA. 1977; VOL. 22; NO 5; PP. 963-968; BIBL. 7 REF.Article

ECONOMICAL ASSOCIATIVE STORAGE WITH UNIVERSAL SEQUENTIAL LOGIC NETWORKS.FAIRHURST MC.1976; ELECTRON. LETTERS; G.B.; DA. 1976; VOL. 12; NO 23; PP. 612-613; BIBL. 7 REF.Article

APPLICATION EQUATIONS, TRANSITION EQUATIONS AND THE REALISATION OF SEQUENTIAL NETWORKS OF JK FLIP-FLOPS.PUCKNELL DA.1976; MONITOR; AUSTRAL.; DA. 1976; VOL. 37; NO 11; PP. 339-342; BIBL. 5 REF.Article

STATE ASSIGNMENT OPTIMIZATION FOR SYNCHRONOUS SEQUENTIAL CIRCUITS USING MULTIPLEXER MODULESACHA JI; MICHELL JA.1980; INTERNATION. J. ELECTRON.; GBR; DA. 1980; VOL. 49; NO 4; PP. 265-277; BIBL. 11 REF.Article

HOW TO DESIGN DIGITAL CIRCUITS. II: SEQUENTIAL CIRCUITS AND MULTIPLE OUTPUT FUNCTIONSWOOLSEY J.1979; RADIO ELECTRON.; USA; DA. 1979; VOL. 50; NO 1; PP. 47-50Article

ZUM NACHWEIS UND ZUR LOKALISIERUNG VON FEHLERN IN LOGISCHEN SCHALTUNGEN. II = LA DETECTION ET LA LOCALISATION DES DEFAUTS DANS LES CIRCUITS LOGIQUES. IIDIMITROV M.1978; NACHR.-TECH., ELEKTRON.; DDR; DA. 1978; VOL. 28; NO 5; PP. 207-210; BIBL. 78 REF.Article

A MASKED-FAULT-FREE REALIZATION OF FAIL-SAFE ASYNCHRONOUS SEQUENTIAL CIRCUITS.MUKAI Y; TOHMA Y.1976; IN: F.T.C.S. 6. 1976 INT. SYMP. FAULT-TOLERANT COMPUT.; PITTSBURGH, PA.; 1976; LONG BEACH; INST. ELECTR. ELECTRON. ENG.; DA. 1976; PP. 69-74; BIBL. 16 REF.Conference Paper

A COMPARISON OF UNIVERSAL-LOGIC-MODULE REALIZATIONS AND THEIR APPLICATION IN THE SYNTHESIS OF COMBINATORIAL AND SEQUENTIAL LOGIC NETWORKSCHEN X; HURST SL.1982; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1982; VOL. 31; NO 2; PP. 140-147; BIBL. 16 REF.Article

IL FAUT EN FINIR AVEC LA METHODE D'HUFFMANBERNARD JM.1979; NOUV. AUTOMATISME; FRA; DA. 1979; VOL. 24; NO 8; PP. 41-50; BIBL. 7 REF.Article

ON UNIVERSAL SINGLE TRANSITION TIME ASYNCHRONOUS STATE ASSIGNMENTSNANYA T; TOHMA Y.1978; I.E.E.E. TRANS. COMPUTERS; USA; DA. 1978; VOL. 27; NO 8; PP. 781-782; BIBL. 2 REF.Article

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