au.\*:("SPAANENBURG L")
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CIRCUIT-IMPLICATIONS OF THE METAL-GATE POLYSILICON SOURCE- AND -DRAIN MOST PROCESS.SPAANENBURG L.1977; I.E.E.E. J. SOLID. STATE CIRCUITS; U.S.A.; DA. 1977; VOL. 12; NO 3; PP. 258-263; BIBL. 12 REF.Article
A PMOS-REALIZATION OF THE IEC-STANDARD INTERFACE.SPAANENBURG L.1977; J. APPL. SCI. ENGNG, A; NETHERL.; DA. 1977; VOL. 2; NO 1; PP. 37-46; BIBL. 7 REF.Article
Efficient silicon compilation of digital control specificationsSPAANENBURG, L.Journal of the Institution of Electronic and Radio Engineers. 1986, Vol 56, Num 4, pp 142-146, issn 0267-1689Article
A methodology for the fast and testable implementation of state diagram specificationsSPAANENBURG, L; SMIT, J; VAN DER VEEN, H et al.IEEE journal of solid-state circuits. 1985, Vol 20, Num 2, pp 548-554, issn 0018-9200Article
Fault tolerance of neural associative memoriesNIJHUIS, J. A. G; SPAANENBURG, L.IEE proceedings. Part E. Computers and digital techniques. 1989, Vol 136, Num 5, pp 389-394, issn 0143-7062, 6 p.Article
Novel switched logic CMOS latch building blockSPAANENBURG, L; POLLOK, W; VERMEULEN, W et al.Electronics Letters. 1985, Vol 21, Num 9, pp 398-399, issn 0013-5194Article
Windowed active sampling for reliable neural learningBARAKOVA, E. I; SPAANENBURG, L.Journal of systems architecture. 1998, Vol 44, Num 8, pp 635-650, issn 1383-7621Conference Paper
Anwendungsstand Künstlicher Neuronaler Netze in der Automatisierungstechnik. VII: Hardwareimplementierung Neuronaler Netze = Artificial neural networks: state of the art in automation. VII: Hardware Implementation of neural networksRÜCKERT, U; SPAANENBURG, L; ANLAUF, J et al.Automatisierungstechnische Praxis. 1993, Vol 35, Num 7, pp 414-420, issn 0178-2320Article
Transformational DT-CNN design from morphological specificationsTER BRUGGE, M. H; NIJHUIS, J. A. G; SPAANENBURG, L et al.IEEE transactions on circuits and systems. 1, Fundamental theory and applications. 1998, Vol 45, Num 9, pp 879-888, issn 1057-7122Article
Stability properties of fuzzy controllersJANSEN, W. J; VENEMA, R. S; TER BRUGGE, M. H et al.Journal A. 1995, Vol 36, Num 3, pp 27-37, issn 0771-1107Article
MOD/R: a knowledge assisted approach towards top-down only CMOS VLSI designSPAANENBURG, L; BEUNDER, M; BEUNE, F. A et al.Microprocessing and microprogramming. 1985, Vol 16, Num 2-3, pp 83-88, issn 0165-6074Article