kw.\*:("TABLEAU LOGIQUE ITERATIF")
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DESIGN OF EASILY TESTABLE BIT-SLICED SYSTEMSTHIRUMALAI SRIDHAR; HAYES JP.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 11; PP. 842-854; BIBL. 18 REF.Article
A FUNCTIONAL APPROACH TO TESTING BIT-SLICED MICROPROCESSORSSRIDHAR T; HAYES JP.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 8; PP. 563-571; BIBL. 14 REF.Article
A TESTABLE DESIGN OF ITERATIVE LOGIC ARRAYSPARTHASARATHY R; REDDY SM.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 11; PP. 833-841; BIBL. 11 REF.Article