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LOGIC ANALYZERSREPORT S.1980; DIGIT. DES.; ISSN 0147-9245; USA; DA. 1980; VOL. 10; NO 12; PP. 58-62; 3 P.Article

TEST EVALUATION WITH A DECISION MACHINECERNY E; MOREAU T.1979; FTCS-9. ANNUAL INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING. 9/1979/MADISON WI; USA; NEW YORK: IEEE; DA. 1979; PP. 117-120; BIBL. 5 REF.Conference Paper

ATE GLUT GIVES MARKET INDIGESTION BUT DESIGNERS HAVE A PANACEIC SOLUTIONDWYER P.1979; CONTROL AND INSTRUMENT.; GBR; DA. 1979; VOL. 11; NO 8; PP. 111-113; (2 P.)Article

A TREE REPRESENTATION OF COMBINATIONAL NETWORKSKUANG WEI CHIANG; VRANESIC ZG.1983; IEEE TRANSACTIONS ON COMPUTERS; ISSN 0018-9340; USA; DA. 1983; VOL. 32; NO 3; PP. 315-319; BIBL. 9 REF.Article

UN DISPOSITIF DE TEST ALEATOIRE POUR MICROPROCESSEUR = A RANDOM TEST DEVICE FOR MICROPROCESSORSJOURDAN DOMINIQUE.1981; ; FRA; DA. 1981; PAG. MULT.; 21 CM; BIBL. 46 REF.; TH. DOCT.-ING./GRENOBLE, INP/1981Thesis

A MODULAR METHOD FOR LSI CIRCUITS TESTINGJASINEVITCHENE G; BURGIS B; METSAEV E et al.1980; COLLOQUE INTERNATIONAL SUR LA FIABILITE ET LA MAINTENABILITE. 2/1980-09-08/PERROS-GUIREC, TREGASTEL; FRA; LANNION: CENTRE DE FIABILITE DU CENTRE NATIONAL D'ETUDES DES TELECOMMUNICATIONS; DA. 1980; PP. 1-5; ABS. FRE; BIBL. 3 REF.Conference Paper

MIKROPROZESSOR-SELBSTTEST AUF DER BASIS DES BEFEHLSSATZES = AUTOTEST DE MICROPROCESSEUR BASE SUR LE JEU D'INSTRUCTIONSHUNGER A.1982; ELEKTRON. RECHENANL.; ISSN 0013-5720; DEU; DA. 1982; VOL. 24; NO 1; PP. 8-15; ABS. ENG; BIBL. 14 REF.Article

UN OUTIL POUR L'ETUDE DU TEST ALEATOIRE DE LA PARTIE OPERATIVE DE MICROPROCESSEURSTHEVENOD FOSSE P; DAVID R.1980; COLLOQUE INTERNATIONAL SUR LA FIABILITE ET LA MAINTENABILITE. 2/1980-09-08/PERROS-GUIREC, TREGASTEL; FRA; LANNION: CENTRE DE FIABILITE DU CENTRE NATIONAL D'ETUDES DES TELECOMMUNICATIONS; DA. 1980; PP. 6-12; ABS. ENG; BIBL. 13 REF.Conference Paper

TEST ET FIABILITE DES MICROPROCESSEURSROBACH C; SAUCIER G.1980; COLLOQUE INTERNATIONAL SUR LA FIABILITE ET LA MAINTENABILITE. 2/1980-09-08/PERROS-GUIREC, TREGASTEL; FRA; LANNION: CENTRE DE FIABILITE DU CENTRE NATIONAL D'ETUDES DES TELECOMMUNICATIONS; DA. 1980; PP. 13-18; ABS. ENG; BIBL. 10 REF.Conference Paper

SOFTWARE GENERATES TESTS FOR COMPLEX DIGITAL CIRCUITSDACIER WC.1982; ELECTRON. DES.; ISSN 0013-4872; USA; DA. 1982; VOL. 30; NO 22; PP. 137-146; 8 P.Article

LE TEST DES MICROPROCESSEURS ET DES SYSTEMES A MICROPROCESSEURS: ETAT DE L'ART ET PERSPECTIVESROBACH C; SAUCIER G.1981; ONDE ELECTR.; ISSN 0030-2430; FRA; DA. 1981; VOL. 61; NO 3; PP. 25-30; ABS. ENG; BIBL. 35 REF.Article

COMMENTS ON "APPLICATION OF FAULT FOLDING IN TEST GENERATION FOR LOGIC CIRCUITS"AGARWAL VK.1980; DIGIT. PROCESS.; CHE; DA. 1980; VOL. 6; NO 1; PP. 105-110; ABS. FRE/GER; BIBL. 8 REF.Article

FAULT-DETECTION EFFICIENCY OF SEQUENTIAL MACHINE USING TRANSITION-TOURNAITO S; TSUNOYAMA M.1980; SYST. COMPUT. CONTROLS; ISSN 0096-8765; USA; DA. 1980 PUBL. 1982; VOL. 11; NO 5; PP. 57-64; BIBL. 12 REF.Article

TESTING MICRO-PROCESSOR BASED CIRCUITS ON SMALL AND MEDIUM PRODUCTION RATESGIORDA F; MOSSO F; RAHO G et al.1980; INTERNATIONAL CONFERENCE ON AUTOMATED INSPECTION AND PRODUCT CONTROL. 5. INSTITUT FUER PRODUKTIONSTECHNIK UND AUTOMATISIERUNG. ARBEITSTAGUNG. 12/1980/STUTTGART; GBR; BEDFORD: IFS PUBLICATIONS; DA. 1980; PP. 211-223Conference Paper

LE TEST FONCTIONNEL PARAMETRABLE DE MICROPROCESSEURROBACH C; SAUCIER G; VELAZCO R et al.1980; R.A.I.R.O., AUTOMAT.; FRA; DA. 1980; VOL. 14; NO 3; PP. 293-308; BIBL. 8 REF.Article

AN ALGORITHM FOR MULTIPLE SIMULTANEOUS TEST GENERATION FOR SEQUENTIAL LOGIC CIRCUITSAIRAPETIAN AN.1980; COLLOQUE INTERNATIONAL SUR LA FIABILITE ET LA MAINTENABILITE. 2/1980-09-08/PERROS-GUIREC, TREGASTEL; FRA; LANNION: CENTRE DE FIABILITE DU CENTRE NATIONAL D'ETUDES DES TELECOMMUNICATIONS; DA. 1980; PP. 486-490; ABS. FRE; BIBL. 5 REF.Conference Paper

IMPROVED TEST SET GENERATION ALGORITHM FOR COMBINATIONAL CIRCUIT CONTROLAIRAPETIAN AN; MCDONALD JF.1979; FTCS-9. ANNUAL INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING. 9/1979/MADISON WI; USA; NEW YORK: IEEE; DA. 1979; PP. 133-136; BIBL. 3 REF.Conference Paper

METHOD FOR THE DIAGNOSIS OF A SINGLE INTERMITTENT FAULT IN COMBINATORIAL LOGIC CIRCUITSLALA PK; MISSEN JI.1979; I.E.E.J. COMPUT. DIGIT. TECH.; GBR; DA. 1979; VOL. 2; NO 5; PP. 187-190; BIBL. 11 REF.Article

TESTING LOGIC NETWORKS AND DESIGNING FOR TESTABILITYWILLIAMS TW; PARKER KP.1979; COMPUTER; USA; DA. 1979; VOL. 12; NO 10; PP. 9-21; BIBL. 99 REF.Article

A METHOD TO ANALYSE RANDOM TESTING OF SEQUENTIAL CIRCUITSTHEVENOD FOSSE P; DAVID R.1978; DIGIT. PROCESS.; CHE; DA. 1978; VOL. 4; NO 3-4; PP. 313-332; ABS. FRE/GER; BIBL. 12 REF.Article

DESIGN OF EASILY TESTABLE BIT-SLICED SYSTEMSTHIRUMALAI SRIDHAR; HAYES JP.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 11; PP. 842-854; BIBL. 18 REF.Article

DIAGNOSABILITY OF NONLINEAR CIRCUITS AND SYSTEMS. I: THE DC CASEVISVANATHAN V; SANGIOVANNI VINCENTELLI A.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 11; PP. 889-898; BIBL. 23 REF.Article

DIAGNOSABILITY OF NONLINEAR CIRCUITS AND SYSTEMS. II: DYNAMICAL SYSTEMSSAEKS R; SANGIOVANNI VINCENTELLI A; VISUANATHAN V et al.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 11; PP. 899-904; BIBL. 8 REF.Article

MULTIPLE FAULT TESTING OF LARGE CIRCUITS BY SINGLE FAULT TEST SETSAGARWAL VK; FUNG ASF.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 11; PP. 855-865; BIBL. 16 REF.Article

A FUNCTIONAL APPROACH TO TESTING BIT-SLICED MICROPROCESSORSSRIDHAR T; HAYES JP.1981; IEEE TRANS. COMPUT.; ISSN 0018-9340; USA; DA. 1981; VOL. 30; NO 8; PP. 563-571; BIBL. 14 REF.Article

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