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A silicon single-electron transistor memory operating at room temperatureGUO, L; LEOBANDUNG, E; CHOU, S. Y et al.Science (Washington, D.C.). 1997, Vol 275, Num 5300, pp 649-651, issn 0036-8075Article

An analytical model for the optimization of source-side injection Flash EEPROM devicesVAN HOUDT, J. F; MAES, H. E.I.E.E.E. transactions on electron devices. 1995, Vol 42, Num 7, pp 1314-1320, issn 0018-9383Article

An analytical model for floating-gate MOSFET including the effects of the overlapping capacitanceMANKU, T; HEASELL, E. L.I.E.E.E. transactions on electron devices. 1992, Vol 39, Num 12, pp 2821-2823, issn 0018-9383Article

A multinanodot floating-gate MOSFET circuit for spiking neuron modelsMORIE, Takashi; MATSUURA, Tomohiro; NAGATA, Makoto et al.IEEE transactions on nanotechnology. 2003, Vol 2, Num 3, pp 158-164, issn 1536-125X, 7 p.Article

Simple method for the determination of the coupling coefficient of floating-gate MOSFETs programmed with Fowler-Nordheim tunnellingREYES-BARRANCA, M. A; MORENO-CADENAS, J. A.IEE proceedings. Circuits, devices and systems. 1999, Vol 146, Num 4, pp 215-217, issn 1350-2409Article

Resolving localized oxide breakthrough during Poly etch of non-volatile floating gates structuresHEALEY, J. T; SIM, V; RUBEL, S et al.SPIE proceedings series. 1998, pp 312-320, isbn 0-8194-2966-XConference Paper

A programmable piecewise linear large-signal CMOS amplifierTHOMSEN, A; BROOKE, M. A.IEEE journal of solid-state circuits. 1993, Vol 28, Num 1, pp 84-89, issn 0018-9200Article

Double doping floating gates improves EPROM yieldsMAKWANA, J; GRULA, B; MONTEILH, D et al.Semiconductor international. 1997, Vol 20, Num 12, pp 125-130, issn 0163-3767, 4 p.Article

A novel approach to controlled programming of tunnel-based floating-gate MOSFET'sLANZONI, M; BRIOZZO, L; RICCO, B et al.IEEE journal of solid-state circuits. 1994, Vol 29, Num 2, pp 147-150, issn 0018-9200Article

A computer-aided scheme of threshold voltage measurement for floating-gate MOS transistorAN SANG HOU.Circuits, systems, and signal processing. 2005, Vol 24, Num 1, pp 83-101, issn 0278-081X, 19 p.Article

History effect characterization in PD-SOI CMOS gatesCASU, M. R; FLATRESSE, P.IEEE International SOI conference. 2002, pp 62-63, isbn 0-7803-7439-8, 2 p.Conference Paper

A non-volatile MOSFET memory device based on mobile protons in SiO2 thin filmsVANHEUSDEN, K; WARREN, W. L; DEVINE, R. A. B et al.Journal of non-crystalline solids. 1999, Vol 254, pp 1-10, issn 0022-3093Conference Paper

A two-dimensional numerical model of a floating-gate EEPROM transistorASQUITH, J; SUNG, C.-L; FAT DUEN HO et al.International journal of electronics. 1998, Vol 85, Num 6, pp 697-712, issn 0020-7217Article

Cast : An electrical stress test to monitor single bit failures in flash-eeprom structuresCAPPELLETTI, P; BEZ, R; CANTARELLI, D et al.Microelectronics and reliability. 1997, Vol 37, Num 3, pp 473-481, issn 0026-2714Article

A new technique for measuring coupling coefficients and 3-D capacitance characterization of floating-gate devicesCHOI, W. L; KIM, D. M.I.E.E.E. transactions on electron devices. 1994, Vol 41, Num 12, pp 2337-2342, issn 0018-9383Article

Etude des transistors à grille flottante et application à la conception d'une mémoire reconfigurable intégrée sur trancheMarron, Dominique; Deneuville, Alain.1989, 220 p.Thesis

Performance analysis by simulation of floating-gate MOSFETs applied on a bidirectional associative memory architectureREYES-BARRANCA, M. A; MORENO-CADENAS, J. A; CASTANEDA, F. Gomez et al.International journal of electronics. 2001, Vol 88, Num 2, pp 159-173, issn 0020-7217Article

A special study on the sensitivity of electron mobility with respect to the tunnel oxide thickness for a floating gate electron-tunneling mosfetGRADO-CAFFARO, M. A; GRADO-CAFFARO, M.EPJ. Applied physics (Print). 1999, Vol 5, Num 1, pp 1-2, issn 1286-0042Article

Simulation of a long term memory device with a full bandstructure Monte Carlo approachLEE, C. H; RAVAIOLI, U; HESS, K et al.IEEE electron device letters. 1995, Vol 16, Num 8, pp 360-362, issn 0741-3106Article

Floating gate MOSFET with reduced programming voltageCHAI, Y.-Y; JOHNSON, L. G.Electronics Letters. 1994, Vol 30, Num 18, pp 1536-1537, issn 0013-5194Article

Low control voltage programming of floating gate MOSFETs and applicationsTHOMSEN, A; BROOKE, M. A.IEEE transactions on circuits and systems. 1, Fundamental theory and applications. 1994, Vol 41, Num 6, pp 443-452, issn 1057-7122Article

A novel scheme for a higher bandwidth sensor readoutSRIVASTAVA, Ashok; VENKATA, Harish N; AJMERA, Pratul K et al.SPIE proceedings series. 2002, pp 17-28, isbn 0-8194-4448-0Conference Paper

Compact floating-gate true random number generatorXU, P; WONG, Y. L; HORIUCHI, T. K et al.Electronics Letters. 2006, Vol 42, Num 23, pp 1346-1347, issn 0013-5194, 2 p.Article

A floating-gate DAC arraySERRANO, G; HASLER, P.IEEE International Symposium on Circuits and Systems. 2004, pp 357-360, isbn 0-7803-8251-X, 4 p.Conference Paper

A single-electron stochastic associative processing circuit robust to random background-charge effects and its structure using nanocrystal floating-gate transistorsYAMANAKA, T; MORIE, T; NAGATA, M et al.Nanotechnology (Bristol. Print). 2000, Vol 11, Num 3, pp 154-160, issn 0957-4484Article

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