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Results 1 to 25 of 79

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Effects of device layout on the drain breakdown voltages in MuGFETsJIN YOUNG KIM; CHONG GUN YU; JONG TAE PARK et al.Microelectronics and reliability. 2011, Vol 51, Num 9-11, pp 1547-1550, issn 0026-2714, 4 p.Conference Paper

Charge-based model enhancement for undoped surrounding-gate MOSFETsZHANG, L; HE, J.Electronics letters. 2009, Vol 45, Num 11, pp 569-570, issn 0013-5194, 2 p.Article

Crystallographic-orientation-dependent GIDL current in Tri-gate MOSFETs under hot carrier stressJAE HOON LEE; JONG TAE PARK.Microelectronics and reliability. 2014, Vol 54, Num 9-10, pp 2315-2318, issn 0026-2714, 4 p.Conference Paper

Electrical characteristics of 20-nm junctionless Si nanowire transistorsPARK, Chan-Hoon; KO, Myung-Dong; KIM, Ki-Hyun et al.Solid-state electronics. 2012, Vol 73, pp 7-10, issn 0038-1101, 4 p.Article

Measurement of Capacitances in Multigate Transistors by Coulomb Blockade SpectroscopyHOFHEINZ, Max; JEHL, Xavier; SANQUER, Marc et al.IEEE transactions on nanotechnology. 2008, Vol 7, Num 1, pp 74-78, issn 1536-125X, 5 p.Article

A unified carrier-based model for undoped symmetric double-gate and surrounding-gate MOSFETsJIN HE; LINING ZHANG; JIAN ZHANG et al.Semiconductor science and technology. 2007, Vol 22, Num 12, pp 1312-1316, issn 0268-1242, 5 p.Article

Performance estimation of junctionless multigate transistorsLEE, Chi-Woo; FERAIN, Isabelle; AFZALIAN, Aryan et al.Solid-state electronics. 2010, Vol 54, Num 2, pp 97-103, issn 0038-1101, 7 p.Article

High threshold voltage matching performance on gate-all-around MOSFETCATHIGNOL, Augustin; CROS, Antoine; HARRISON, Samuel et al.Solid-state electronics. 2007, Vol 51, Num 11-12, pp 1450-1457, issn 0038-1101, 8 p.Conference Paper

A new method for the extraction of flat-band voltage and doping concentration in Tri-gate Junctionless TransistorsJEON, D.-Y; PARK, S. J; MOUIS, M et al.Solid-state electronics. 2013, Vol 81, pp 113-118, issn 0038-1101, 6 p.Article

An analytic model for threshold voltage shift due to quantum confinement in surrounding gate MOSFETs with anisotropic effective massYU YUAN; BO YU; SONG, Jooyoung et al.Solid-state electronics. 2009, Vol 53, Num 2, pp 140-144, issn 0038-1101, 5 p.Article

A Unified Analytic Drain-Current Model for Multiple-Gate MOSFETsBO YU; SONG, Jooyoung; YU YUAN et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 8, pp 2157-2163, issn 0018-9383, 7 p.Article

Junctionless Π-gate transistor with indium gallium arsenide channelGUO, H. X; ZHANG, X; ZHU, Z et al.Electronics letters. 2013, Vol 49, Num 6, pp 402-404, issn 0013-5194, 3 p.Article

The Impact of Substrate Bias on the Steep Subthreshold Slope in Junctionless MuGFETsSEUNG MIN LEE; JONG TAE PARK.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 11, pp 3856-3861, issn 0018-9383, 6 p.Article

Compact capacitance modeling of a 3-terminal FET at zero drain-source voltageINIGUEZ, Benjamin; MOLDOVAN, Oana.Solid-state electronics. 2010, Vol 54, Num 5, pp 520-523, issn 0038-1101, 4 p.Article

Impact of back gate biases on hot carrier effects in multiple gate junctionless transistorsSEUNG MIN LEE; HYUN JUN JANG; JONG TAE PARK et al.Microelectronics and reliability. 2013, Vol 53, Num 9-11, pp 1329-1332, issn 0026-2714, 4 p.Conference Paper

Experimental demonstration and analysis of high performance and low 1 /f noise Tri-gate MOSFETs by optimizing device structureWEITAO CHENG; TERAMOTO, Akinobu; OHMI, Tadahiro et al.Microelectronic engineering. 2009, Vol 86, Num 7-9, pp 1786-1788, issn 0167-9317, 3 p.Conference Paper

A Charge-Based Model for Long-Channel Cylindrical Surrounding-Gate MOSFETs From Intrinsic Channel to Heavily Doped BodyFENG LIU; JIN HE; LINING ZHANG et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 8, pp 2187-2194, issn 0018-9383, 8 p.Article

Tri-Gate Bulk MOSFET Design for CMOS Scaling to the End of the RoadmapXIN SUN; QIANG LU; MOROZ, Victor et al.IEEE electron device letters. 2008, Vol 29, Num 5, pp 491-493, issn 0741-3106, 3 p.Article

Effect of localised charges on nanoscale cylindrical surrounding gate MOSFET: Analog performance and linearity analysisGAUTAM, Rajni; SAXENA, Manoj; GUPTA, R. S et al.Microelectronics and reliability. 2012, Vol 52, Num 6, pp 989-994, issn 0026-2714, 6 p.Article

A Unified Carrier-Transport Model for the Nanoscale Surrounding-Gate MOSFET Comprising Quantum-Mechanical EffectsGUANGXI HU; JINGLUN GU; SHUYAN HU et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 7, pp 1830-1836, issn 0018-9383, 7 p.Article

An Analytical I-V Model for Surrounding-Gate Transistors That Includes Quantum and Velocity Overshoot EffectsROLDAN, J. B; GAMIZ, Francisco; JIMENEZ-MOLINOS, F et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 11, pp 2925-2933, issn 0018-9383, 9 p.Article

Analytical Threshold Voltage Model Including Effective Conducting Path Effect (ECPE) for Surrounding-Gate MOSFETs (SGMOSFETs) With Localized ChargesYUN SEOP YU; CHO, Namki; SUNG WOO HWANG et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 11, pp 3176-3180, issn 0018-9383, 5 p.Article

Ultra High-Stress Liner Comprising Diamond-Like Carbon for Performance Enhancement of p-Channel Multiple-Gate TransistorsTAN, Kian-Ming; MINGCHU YANG; LIOW, Tsung-Yang et al.I.E.E.E. transactions on electron devices. 2009, Vol 56, Num 6, pp 1277-1283, issn 0018-9383, 7 p.Article

A carrier-based analytic drain current model incorporating velocity saturation for undoped surrounding-gate MOSFETsLINING ZHANG; YAN GUAN; WANG ZHOU et al.Semiconductor science and technology. 2009, Vol 24, Num 11, issn 0268-1242, 115003.1-115003.8Article

A Physics Based Analytical Solution to Undoped Cylindrical Surrounding-Gate (SRG) MOSFETsJIN HE; MANSUN CHAN.IEEE International Caracas Conference on Devices, Circuits, and Systems. 2004, pp 26-28, isbn 0-7803-8777-5, 1Vol, 3 p.Conference Paper

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