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Results 1 to 25 of 12355

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Solutions Strategies for Die Shift Problem in Wafer Level Compression MoldingSHARMA, Gaurav; KUMAR, Aditya; RAO, Vempati Srinivas et al.IEEE transactions on components, packaging, and manufacturing technology (2011. Print). 2011, Vol 1, Num 3-4, pp 502-509, issn 2156-3950, 8 p.Article

ZoneBOND Thin Wafer Support Process for Wafer Bonding ApplicationsMCCUTCHEON, Jeremy; BROWN, Robert; DACHSTEINER, Joelle et al.Journal of microelectronics and electronic packaging. 2010, Vol 7, Num 3, pp 138-142, issn 1551-4897, 5 p.Article

Fabricating capacitive micromachined ultrasonic transducers with wafer-bonding technologyYONGLI HUANG; ERGUN, A. Sanli; HAEGGSTRÖM, Edward et al.Journal of microelectromechanical systems. 2003, Vol 12, Num 2, pp 128-137, issn 1057-7157, 10 p.Article

Pull system for control and dummy wafersCHEN, H.-C; LEE, C.-E. C.International journal, advanced manufacturing technology. 2003, Vol 22, Num 11-12, pp 805-818, issn 0268-3768, 14 p.Article

Continuous and independent monitor wafer reduction in DRAM fabWATANABE, A; KOBAYASHI, T; EGI, T et al.IEEE international symposium on semiconductor manufacturing conference. 1999, pp 303-306, isbn 0-7803-5403-6Conference Paper

Nanotopography produced by using a vacuum pin chuck and the flattening ability around its peripheryUNE, A; YOSHITOMI, K; MOCHIDA, M et al.Microelectronic engineering. 2007, Vol 84, Num 5-8, pp 761-765, issn 0167-9317, 5 p.Conference Paper

Investigation and Effects of Wafer Bow in 3D Integration Bonding SchemesCHEN, K. N; ZHU, Y; WU, W. W et al.Journal of electronic materials. 2010, Vol 39, Num 12, pp 2605-2610, issn 0361-5235, 6 p.Conference Paper

High-Temperature Spin-On Adhesives for Temporary Wafer BondingPILLALAMARRI, S; PULIGADDA, R; BRUBAKER, C et al.Journal of microelectronics and electronic packaging. 2007, Vol 4, Num 3, pp 105-111, issn 1551-4897, 7 p.Article

A systematic approach to thinning silicon wafers to the sub-40μm thickness rangeARUNASALAM, Parthiban; GORDON, Matthew H; SCHAPER, Leonard W et al.Journal of microelectronics and electronic packaging. 2006, Vol 3, Num 2, pp 86-94, issn 1551-4897, 9 p.Article

Improved low-temperature Si-Si hydrophilic wafer bondingESSER, R. H; HOBART, K. D; KUB, F. J et al.Journal of the Electrochemical Society. 2003, Vol 150, Num 3, pp G228-G231, issn 0013-4651Article

Wafer bonding: A flexible approach to materials integrationGÖSELE, U; ALEXE, M.The Electrochemical Society interface. 2000, Vol 9, Num 2, pp 20-25, issn 1064-8208Article

Investigation of gross die per wafer formulasDE VRIES, Dirk K.IEEE transactions on semiconductor manufacturing. 2005, Vol 18, Num 1, pp 136-139, issn 0894-6507, 4 p.Article

Fine grinding of silicon wafers: A mathematical model for grinding marksCHIDAMBARAM, S; PEI, Z. J; KASSIR, S et al.International journal of machine tools & manufacture. 2003, Vol 43, Num 15, pp 1595-1602, issn 0890-6955, 8 p.Article

Maximizing the Functional Yield of Wafer-to-Wafer 3-D IntegrationREDA, Sherief; SMITH, Gregory; SMITH, Larry et al.IEEE transactions on very large scale integration (VLSI) systems. 2009, Vol 17, Num 9, pp 1357-1362, issn 1063-8210, 6 p.Article

Environmentally benign single-wafer spin cLeaning using ultra-diluted HF/nitrogen jet spray without causing structural damage and material lossHATTORI, Takeshi; HIRANO, Hideki; OSAKA, Tsutomu et al.IEEE transactions on semiconductor manufacturing. 2007, Vol 20, Num 3, pp 252-258, issn 0894-6507, 7 p.Conference Paper

Characterization of embedded rhomboidal microchannels formation on silicon (100) surfaceD'ARRIGO, Giuseppe; SPINELLA, Corrado; RIMINI, Emanuele et al.Journal of the Electrochemical Society. 2004, Vol 151, Num 8, pp C523-C526, issn 0013-4651Article

Near infra-red Mueller matrix imaging system and application to retardance imaging of strainSANDVIK AAS, Lars Martin; GUNNAR ELLINGSEN, Pal; KILDEMO, Morten et al.Thin solid films. 2011, Vol 519, Num 9, pp 2737-2741, issn 0040-6090, 5 p.Conference Paper

A Radiation Imaging Detector Made by Postprocessing a Standard CMOS ChipBLANCO CARBALLO, Victor Manuel; CHEFDEVILLE, Maximilien; FRANSEN, Martin et al.IEEE electron device letters. 2008, Vol 29, Num 6, pp 585-587, issn 0741-3106, 3 p.Article

Demonstration and Electrical Performance Investigation of Wafer-Level Cu Oxide Hybrid Bonding SchemesCHEN, Kuan-Neng; ZHENG XU; LU, Jian-Qiang et al.IEEE electron device letters. 2011, Vol 32, Num 8, pp 1119-1121, issn 0741-3106, 3 p.Article

System-on-Wafer: 2-D and 3-D Technologies for Heterogeneous SystemsSOURIAU, Jean-Charles; SILLON, Nicolas; BRUN, Jean et al.IEEE transactions on components, packaging, and manufacturing technology (2011. Print). 2011, Vol 1, Num 5-6, pp 813-824, issn 2156-3950, 12 p.Article

Development of a 3-D Process Technology for Wafer-Level Packaging of MEMS DevicesCHOI, Woo-Chang; CHOI, Hyun-Jin.IEEE transactions on components, packaging, and manufacturing technology (2011. Print). 2012, Vol 2, Num 9-10, pp 1442-1448, issn 2156-3950, 7 p.Article

Nano-scale analysis of precipitates in nitrogen-doped Czochralski siliconROZGONYI, G. A; KAROUI, A; KVIT, A et al.Microelectronic engineering. 2003, Vol 66, Num 1-4, pp 305-313, issn 0167-9317, 9 p.Conference Paper

Integration of High Aspect Ratio Tapered Silicon Via for Silicon Carrier FabricationRANGANATHAN, N; EBIN, Liao; LINN, Linn et al.IEEE transactions on advanced packaging. 2009, Vol 32, Num 1, pp 62-71, issn 1521-3323, 10 p.Article

Flach- und Hohlkörperwaffeln : moderne Maschinen und Anlagen sind nötig = Wafers of flat- and hollow bodyHEIL, W.Zucker- und Süsswaren-Wirtschaft. 1992, Vol 45, Num 3, pp 94-97, issn 0373-0204Conference Paper

Low-temperature wafer bonding for MEMS packaging utilizing screen-printed sub-micron size Au particle patternsISHIZUK, S; AKIYAMA, N; OGASHIWA, T et al.Microelectronic engineering. 2011, Vol 88, Num 8, pp 2275-2277, issn 0167-9317, 3 p.Conference Paper

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