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Copper electrodeposition of high-aspect-ratio vias for three dimensional packagingKONDO, Kazuo; YONEZAWA, Toshihiro; TOMISAKA, Manabu et al.Proceedings - Electrochemical Society. 2003, pp 28-32, issn 0161-6374, isbn 1-56677-390-3, 5 p.Conference Paper

A 160Gb/s interface design configuration for multichip LSIEZAKI, Takayuki; KONDO, Kazuhiro; OZAKI, Hiroshi et al.IEEE International Solid-State Circuits Conference. 2004, pp 140-141, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

High-aspect-ratio copper via filling used for three-dimensional chip stackingSUN, Jian-Jun; KONDO, Kazuo; OKAMURA, Takuji et al.Journal of the Electrochemical Society. 2003, Vol 150, Num 6, pp G355-G358, issn 0013-4651Article

Electroplating Cu fillings for through-vias for three-dimensional chip stackingTOMISAKA, Manabu; YONEMURA, Hitoshi; HOSHINO, Masataka et al.Proceedings - Electronic Components Conference. 2002, pp 1432-1438, issn 0569-5503, isbn 0-7803-7430-4, 7 p.Conference Paper

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