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Justifying threshold voltage definition for undoped body transistors through crossover point conceptRATUL KUMAR BARUAH; MAHAPATRA, Santanu.Physica. B, Condensed matter. 2009, Vol 404, Num 8-11, pp 1029-1032, issn 0921-4526, 4 p.Article

A Computationally Efficient Generalized Poisson Solution for Independent Double-Gate TransistorsSAHOO, Avinash; PANKAJ KUMAR THAKUR; MAHAPATRA, Santanu et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 3, pp 632-636, issn 0018-9383, 5 p.Article

Experimental evaluation of effects of channel doping on characteristics of FinFETsENDO, Kazuhiko; ISHIKAWA, Yuki; YAMAUCHI, Hiromi et al.IEEE electron device letters. 2007, Vol 28, Num 12, pp 1123-1125, issn 0741-3106, 3 p.Article

Design optimization of gate-all-around (GAA) MOSFETsJAE YOUNG SONG; WOO YOUNG CHOI; JU HEE PARK et al.IEEE transactions on nanotechnology. 2006, Vol 5, Num 3, pp 186-191, issn 1536-125X, 6 p.Conference Paper

Explicit analytical charge and capacitance models of undoped double-gate MOSFETsMOLDOVAN, Oana; JIMENEZ, David; ROIG GUITART, Jaume et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 7, pp 1718-1724, issn 0018-9383, 7 p.Article

Analytic Model for Undoped Symmetric Double-Gate MOSFETs With Small Gate-Oxide-Thickness AsymmetrySHENG CHANG; GAOFENG WANG; QIJUN HUANG et al.I.E.E.E. transactions on electron devices. 2009, Vol 56, Num 10, pp 2297-2301, issn 0018-9383, 5 p.Article

Demonstration, analysis, and device design considerations for independent DG MOSFETsMASAHARA, Meishoku; YONGXUN LIU; KOIKE, Hanpei et al.I.E.E.E. transactions on electron devices. 2005, Vol 52, Num 9, pp 2046-2053, issn 0018-9383, 8 p.Article

Independently driven DG MOSFETs for mixed-signal circuits: Part I: Quasi-static and nonquasi-static channel couplingGEN PEI; KAN, Edwin Chih-Chuan.I.E.E.E. transactions on electron devices. 2004, Vol 51, Num 12, pp 2086-2093, issn 0018-9383, 8 p.Article

A Rigorous Classical Solution for the Drain Current of Doped Symmetric Double-Gate MOSFETsORTIZ-CONDE, Adelmo; GARCIA-SANCHEZ, Francisco J.I.E.E.E. transactions on electron devices. 2012, Vol 59, Num 9, pp 2390-2395, issn 0018-9383, 6 p.Article

A Non-Charge-Sheet Analytic Model for Symmetric Double-Gate MOSFETs With Smooth Transition Between Partially and Fully Depleted Operation ModesFENG LIU; JIN HE; JIAN ZHANG et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 12, pp 3494-3502, issn 0018-9383, 9 p.Article

Independently driven DG MOSFETs for mixed-signal circuits: Part II: Applications on cross-coupled feedback and harmonics generationGEN PEI; KAN, Edwin Chih-Chuan.I.E.E.E. transactions on electron devices. 2004, Vol 51, Num 12, pp 2094-2101, issn 0018-9383, 8 p.Article

Short-channel effects in independent-gate FinFETsZHICHAO LU; FOSSUM, Jerry G.IEEE electron device letters. 2007, Vol 28, Num 2, pp 145-147, issn 0741-3106, 3 p.Article

Analytical Threshold Voltage Model for Double-Gate MOSFETs With Localized ChargesKANG, Hongki; HAN, Jin-Woo; CHOI, Yang-Kyu et al.IEEE electron device letters. 2008, Vol 29, Num 8, pp 927-930, issn 0741-3106, 4 p.Article

New Unified Analytical Model of Backscattering Coefficient From Low-to High-Field Conditions in Quasi-Ballistic TransportMARTINIE, Sébastien; MUNTEANU, Daniela; LE CARVAL, Gilles et al.IEEE electron device letters. 2008, Vol 29, Num 12, pp 1392-1394, issn 0741-3106, 3 p.Article

An analytic potential model for symmetric and asymmetric DG MOSFETsHUAXIN LU; TAUR, Yuan.I.E.E.E. transactions on electron devices. 2006, Vol 53, Num 5, pp 1161-1168, issn 0018-9383, 8 p.Article

Double gate-MOSFET subthreshold circuit for ultralow power applicationsKIM, Jae-Joon; ROY, Kaushik.I.E.E.E. transactions on electron devices. 2004, Vol 51, Num 9, pp 1468-1474, issn 0018-9383, 7 p.Article

Nonquasi-Static Charge Model for Common Double-Gate MOSFETs Adapted to Gate Oxide Thickness AsymmetrySHARAN, Neha; MAHAPATRA, Santanu.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 7, pp 2419-2422, issn 0018-9383, 4 p.Article

Generic Carrier-Based Core Model for Undoped Four-Terminal Double-Gate MOSFETs Valid for Symmetric, Asymmetric, and Independent-Gate-Operation ModesFENG LIU; JIN HE; YUE FU et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 3, pp 816-826, issn 0018-9383, 11 p.Article

Threshold Voltage Model for Short-Channel Undoped Symmetrical Double-Gate MOSFETsTSORMPATZOGLOU, Andreas; DIMITRIADIS, Charalabos A; CLERC, Raphael et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 9, pp 2512-2516, issn 0018-9383, 5 p.Article

Compact modeling solutions for short-channel SOI Schottky barrier MOSFETsSCHWARZ, Mike; HOLTIJ, Thomas; KLOES, Alexander et al.Solid-state electronics. 2013, Vol 82, pp 86-98, issn 0038-1101, 13 p.Article

Analytical compact modeling framework for the 2D electrostatics in lightly doped double-gate MOSFETsSCHWARZ, Mike; HOLTIJ, Thomas; KLOES, Alexander et al.Solid-state electronics. 2012, Vol 69, pp 72-84, issn 0038-1101, 13 p.Article

2D analytical calculation of the electrostatic potential in lightly doped Schottky barrier Double-Gate MOSFETSCHWARZ, Mike; WEIDEMANN, Michaela; KLOES, Alexander et al.Solid-state electronics. 2010, Vol 54, Num 11, pp 1372-1380, issn 0038-1101, 9 p.Article

A study of highly scalable DG-FinDRAMYOSHIDA, E; MIYASHITA, T; TANAKA, T et al.IEEE electron device letters. 2005, Vol 26, Num 9, pp 655-657, issn 0741-3106, 3 p.Article

A Highly Scalable Capacitorless Double Gate Quantum Well Single Transistor DRAM : 1T-QW DRAMGÜNHAN ERTOSUN, M; KAPUR, Pawan; SARASWAT, Krishna C et al.IEEE electron device letters. 2008, Vol 29, Num 12, pp 1405-1407, issn 0741-3106, 3 p.Article

Novel high-density low-power logic circuit techniques using DG devicesCHIANG, Meng-Hsueh; KIM, Keunwoo; TRETZ, Christophe et al.I.E.E.E. transactions on electron devices. 2005, Vol 52, Num 10, pp 2339-2342, issn 0018-9383, 4 p.Article

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