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Results 1 to 25 of 95006

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Self-tuning adaptive delay sequential elementsRAHIMI, Kambiz; DIORIO, Chris.Microelectronics journal. 2007, Vol 38, Num 4-5, pp 454-462, issn 0959-8324, 9 p.Conference Paper

Calcul de circuits électroniques à retard à l'aide d'.un microordinaeurPOSPELOV, V. A.Radiotehnika (Moskva). 1989, Num 2, issn 0033-8486, 79 [1 p.]Article

Zur Klärung des Intermodulations-Sättigungsverhaltens beim Dioden-Ringmischer = Sur les propriétés de saturation de l'intermodulation des mélangeurs compensés doubles = On the saturation properties of intermodulation of double balanced diode MixersVAN ELLEN, H; FRANK, P.AEU. Archiv für Elektronik und Übertragungstechnik. 1988, Vol 42, Num 3, pp 195-197, issn 0001-1096Article

Novel electrical squaring circuit with an output bandwidth from DC to 2.6 GHzVODHANEL, R. S.Electronics Letters. 1988, Vol 24, Num 9, pp 534-536, issn 0013-5194Article

Wideband Microwave Absorber Based on a Two-Dimensional Periodic Array of Microstrip LinesAMIR KHURRUM RASHID; ZHONGXIANG SHEN; ADITYA, Sheel et al.IEEE transactions on antennas and propagation. 2010, Vol 58, Num 12, pp 3913-3922, issn 0018-926X, 10 p.Article

A Cost-Effective TCP/IP Offload Accelerator Design for Network Interface ControllerHASHIMOTO, K; MOSHNYAGA, V. G.Computer design. International conferenceWorldComp'2010. 2010, pp 153-159, isbn 1-60132-135-X, 7 p.Conference Paper

Low energy single event upset/single event transient-tolerant latch for deep subMicron technologiesFAZELI, M; MIREMADI, S. G; EJLALI, A et al.IET computers & digital techniques (Print). 2009, Vol 3, Num 3, pp 289-303, issn 1751-8601, 15 p.Article

High Speed Integrated Circuit Technology, Towards 100 GHz LogicRODWELL, M. J. W.International journal of high speed electronics and systems. 2001, Vol 11, Num 1, 367 p.Serial Issue

The convergence of a PLL with variable parametersWULICH, D; BAR, M.International journal of circuit theory and applications. 1990, Vol 18, Num 2, pp 135-143, issn 0098-9886Article

A simple algorithm for finding all solutions of piecewise-linear networksQIU HUANG; RUEY-WEN LIU.IEEE transactions on circuits and systems. 1989, Vol 36, Num 4, pp 600-609, issn 0098-4094Article

Calcul du circuit dissipatif de correction entre cascades d'un amplificateur de puissance à large bandeTITOV, A. A.Radiotehnika (Moskva). 1989, Num 2, pp 88-90, issn 0033-8486Article

Digital active and reactive power measurement using sample/holdHAMAD, K. A; JABOURI, M. Y; AL-KHATEEB, T. R et al.International journal of electronics. 1988, Vol 65, Num 2, pp 263-267, issn 0020-7217Article

Etude de structures de déphaseurs analogiques potentiellement intégrables à 900MHzCoupez, Jean-Philippe; Perichon, R. A.1988, 174 p.Thesis

Development of a Microwave Exciter for 87Sr+ Ion frequency Standards : Recent Trends of Microwave Systems and Their Funfamental TechnologiesHIRANO, Iku.IEICE transactions on electronics. 2012, Vol 95, Num 7, pp 1231-1233, issn 0916-8524, 3 p.Article

Evaluation of digitally controlled PLL by clock-period comparison : Analog circuits and related SoC integration technologiesMAKIHARA, Yukinobu; IKEBE, Masayuki; SANO, Eiichi et al.IEICE transactions on electronics. 2007, Vol 90, Num 6, pp 1307-1310, issn 0916-8524, 4 p.Article

A proposal to improve the quality of a sample and hold output voltageBAYARD, J; AYACHI, M.International journal of electronics. 2005, Vol 92, Num 4, pp 243-249, issn 0020-7217, 7 p.Article

Extended lock range zero-crossing digital phase-locked loop with time delayNASIR, Qassim.EURASIP Journal on wireless communications and networking. 2005, Num 3, pp 413-418, issn 1687-1472, 6 p.Article

A fully differential current copier for performance improvementRENYUAN HUANG; WANG, J.-S; WEY, C.-L et al.International journal of circuit theory and applications. 2000, Vol 28, Num 2, pp 101-108, issn 0098-9886Article

Analysis of a hybrid analog/switched-capacitor phase-locked loopASTA, D; GREEN, D. N.IEEE transactions on circuits and systems. 1990, Vol 37, Num 2, pp 183-197, issn 0098-4094Article

A high-voltage, short-risetime pulse generator based on a ferrite pulse sharpenerSEDDON, N; THORNTON, E.Review of scientific instruments. 1988, Vol 59, Num 11, pp 2497-2498, issn 0034-6748Article

Convergence behaviour of the first-order multisampling digital tanlock loopCHO, W. D; UN, C. K.IEE proceedings. Part F. Communications, radar and signal processing. 1988, Vol 135, Num 5, pp 457-460, issn 0143-7070Article

A 125―1250 MHz Process-Independent Adaptive Bandwidth Spread Spectrum Clock Generator With Digital Controlled Self-CalibrationEBUCHI, Tsuyoshi; KOMATSU, Yoshihide; YOSHIKAWA, Takefumi et al.IEEE journal of solid-state circuits. 2009, Vol 44, Num 3, pp 763-774, issn 0018-9200, 12 p.Article

Digital compensator for large phase-error glitches in digital PLLLEE, Ja-Yol; PARK, Mi-Jeong; CHEON SOO KIM et al.Electronics letters. 2012, Vol 48, Num 19, pp 1184-1185, issn 0013-5194, 2 p.Article

Tapered distributed analogue tunable phase shifter with low insertion and return lossBOURTOUTIAN, R; FERRARI, P.Electronics Letters. 2005, Vol 41, Num 15, pp 852-854, issn 0013-5194, 3 p.Article

Estimation de l'affaiblissement mutuel de signaux de type bruit qui se recouvrent dans un filtre numérique adaptéBOLISHAKOV, N.A.Radiotehnika (Moskva). 1989, Num 3, pp 40-41, issn 0033-8486Article

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