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Results 1 to 25 of 43471

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Multiple gate devices : advantages and challengesPOIROUX, T; VINET, M; FAYNOT, O et al.Microelectronic engineering. 2005, Vol 80, pp 378-385, issn 0167-9317, 8 p.Conference Paper

Analytical modeling of subthreshold current and subthreshold swing of an underlap DGMOSFET with tied-independent gate and symmetric-asymmetric optionsVADDI, Ramesh; AGARWAL, R. P; DASGUPTA, S et al.Microelectronics journal. 2011, Vol 42, Num 5, pp 798-807, issn 0959-8324, 10 p.Article

A compact DC model of gate oxide short defectBOUCHAKOUR, R; PORTAL, J. M; GALLIERE, J. M et al.Microelectronic engineering. 2004, Vol 72, Num 1-4, pp 140-148, issn 0167-9317, 9 p.Conference Paper

Impact of the anode current of an IGBT on the gate voltageBOCK, Burkhard; STEIMEL, Andreas.Power electronics specialists conference. 2004, pp 2930-2936, isbn 0-7803-8399-0, 6Vol, 7 p.Conference Paper

A Universal Core Model for Multiple-Gate Field-Effect Transistors. Part I: Charge ModelDUARTE, Juan Pablo; CHOI, Sung-Jin; MOON, Dong-Il et al.I.E.E.E. transactions on electron devices. 2013, Vol 60, Num 2, pp 840-847, issn 0018-9383, 8 p.Article

Drive-current enhancement in FinFETs using gate-induced stressTAN, Kian-Ming; LIOW, Tsung-Yang; LEE, Rinus T. P et al.IEEE electron device letters. 2006, Vol 27, Num 9, pp 769-771, issn 0741-3106, 3 p.Article

Solution space for the independent-gate asymmetric DGFETDESSAI, Gajanan; GILDENBLAT, Gennady.Solid-state electronics. 2010, Vol 54, Num 4, pp 382-384, issn 0038-1101, 3 p.Article

Analytical solution of fundamental surface potential equations for symmetric double-gate metal-oxide-semiconductor field-effect transistorsSHENG CHANG; GAOFENG WANG; QIJUN HUANG et al.International journal of electronics. 2009, Vol 96, Num 9-10, pp 1023-1038, issn 0020-7217, 16 p.Article

Demonstration, analysis, and device design considerations for independent DG MOSFETsMASAHARA, Meishoku; YONGXUN LIU; KOIKE, Hanpei et al.I.E.E.E. transactions on electron devices. 2005, Vol 52, Num 9, pp 2046-2053, issn 0018-9383, 8 p.Article

Structure of the breakdown spot during progressive breakdown of ultra-thin gate oxidesPALUMBO, F; LOMBARDO, S; PEY, K. L et al.IEEE international reliability physics symposium. 2004, pp 583-584, isbn 0-7803-8315-X, 1Vol, 2 p.Conference Paper

A Unified Analytic Drain-Current Model for Multiple-Gate MOSFETsBO YU; SONG, Jooyoung; YU YUAN et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 8, pp 2157-2163, issn 0018-9383, 7 p.Article

Compact Double-Gate Metal-Oxide-Semiconductor Field Effect Transistor Model for Device/Circuit OptimizationSADACHIKA, Norio; MURAKAMI, Takahiro; OKA, Hideki et al.IEICE transactions on electronics. 2008, Vol 91, Num 8, pp 1379-1381, issn 0916-8524, 3 p.Article

On the analog and radio frequency performance of Junctionless Single Metal Gate cylindrical surround gate metal-oxide-semiconductor field-effect transistorsSANTOSH KUMAR GUPTA; BAISHYA, Srimanta.Simulation (San Diego, Calif.). 2014, Vol 90, Num 10, pp 1119-1128, issn 0037-5497, 10 p.Article

Gate-extension overlap control by sb tilt implantation : Fundamentals and applications of advanced semiconductor devicesSHIBAHARA, Kentaro; MAEDA, Nobuhide.IEICE transactions on electronics. 2007, Vol 90, Num 5, pp 973-977, issn 0916-8524, 5 p.Article

Analytical Model of Subthreshold Current and Slope for Asymmetric 4-T and 3-T Double-Gate MOSFETsDEY, Aritra; CHAKRAVORTY, Anjan; DASGUPTA, Nandita et al.I.E.E.E. transactions on electron devices. 2008, Vol 55, Num 12, pp 3442-3449, issn 0018-9383, 8 p.Article

Independent double-gate FinFETs with asymmetric gate stacksMASAHARA, M; SURDEANU, R; SUZUKI, E et al.Microelectronic engineering. 2007, Vol 84, Num 9-10, pp 2097-2100, issn 0167-9317, 4 p.Conference Paper

Compact capacitance modeling of a 3-terminal FET at zero drain-source voltageINIGUEZ, Benjamin; MOLDOVAN, Oana.Solid-state electronics. 2010, Vol 54, Num 5, pp 520-523, issn 0038-1101, 4 p.Article

Analytical threshold voltage model with TCAD simulation verification for design and evaluation of tri-gate MOSFETsYAWEI JIN; CHANG ZENG; LEI MA et al.Solid-state electronics. 2007, Vol 51, Num 3, pp 347-353, issn 0038-1101, 7 p.Article

Analytic Model for Undoped Symmetric Double-Gate MOSFETs With Small Gate-Oxide-Thickness AsymmetrySHENG CHANG; GAOFENG WANG; QIJUN HUANG et al.I.E.E.E. transactions on electron devices. 2009, Vol 56, Num 10, pp 2297-2301, issn 0018-9383, 5 p.Article

Demonstration of asymmetric gate-oxide thickness four-terminal FinFETs having flexible threshold voltage and good subthreshold slopeMASAHARA, Meishoku; SURDEANU, Radu; JURCZAK, Malgorzata et al.IEEE electron device letters. 2007, Vol 28, Num 3, pp 217-219, issn 0741-3106, 3 p.Article

A new MOS-gate bipolar transistor for power switchesTANAKA, T; YASUDA, Y; OHAYASHI, M et al.I.E.E.E. transactions on electron devices. 1986, Vol 33, Num 12, pp 2041-2045, issn 0018-9383Article

Impact of μA-ON-current gate-all-around TFT (GAT) for static RAM of 16Mb and beyondMAEGAWA, S; IPPOSHI, T; MAEDA, S et al.Japanese journal of applied physics. 1996, Vol 35, Num 2B, pp 910-914, issn 0021-4922, 1Conference Paper

Shielding region effects on a trench gate IGBTLEE, Jong-Seok; KANG, Ey-Goo; MAN YOUNG SUNG et al.Microelectronics journal. 2008, Vol 39, Num 1, pp 57-62, issn 0959-8324, 6 p.Article

The influence of substrate compensation on inter-electrode leakage and back-gating in GaAs MESFETGEORGE, P; KO, P. K; CHENMING HU et al.Solid-state electronics. 1991, Vol 34, Num 3, pp 233-252, issn 0038-1101, 20 p.Article

Efficient and Accurate Schematic Transistor Model of FinFET Parasitic ElementsNING LU; HOOK, Terence B; JOHNSON, Jeffrey B et al.IEEE electron device letters. 2013, Vol 34, Num 9, pp 1100-1102, issn 0741-3106, 3 p.Article

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