kw.\*:(%22Field programmable gate array%22)
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A novel FPGA architecture supporting wide, shallow memoriesOLDRIDGE, Steven W; WILTON, Steven J. E.IEEE transactions on very large scale integration (VLSI) systems. 2005, Vol 13, Num 6, pp 758-762, issn 1063-8210, 5 p.Article
FPGA 2006 (Fourteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays)ACM International Symposium on Field-Programmable Gate Arrays. 2006, isbn 1-595-93292-5, 1Vol, VIII-240 p, isbn 1-595-93292-5Conference Proceedings
International Conference on Field Programmable Logic and Applications (FPL)LEONG, Philip H. W; KOCH, Andreas; BOEMO, Eduardo et al.IET computers & digital techniques (Print). 2007, Vol 1, Num 4, pp 267-321, issn 1751-8601, 54 p.Conference Paper
Implementation of www server in SoPCGROBELNY, Michal; WEGRZYN, Marek.Proceedings of SPIE, the International Society for Optical Engineering. 2006, issn 0277-786X, isbn 0-8194-6431-7, vol2, 63472Y.1-63472Y.8Conference Paper
Jamming protection of spread spectrum RFID systemMAZUREK, Gustaw.Proceedings of SPIE, the International Society for Optical Engineering. 2006, issn 0277-786X, isbn 0-8194-6431-7, vol2, 634721.1-634721.6Conference Paper
Clock-efficient and maintainable implementation of complex state machines in VHDLZABOLOTNY, Wojciech M.Proceedings of SPIE, the International Society for Optical Engineering. 2006, issn 0277-786X, isbn 0-8194-6431-7, vol1, 63470G.1-63470G.8Conference Paper
Design of test system of the control and logic transform device of the flight control system based on FPGAWANG, Liru; ZHANG, Qingrong.Proceedings of SPIE, the International Society for Optical Engineering. 2006, issn 0277-786X, isbn 0-8194-6452-X, Vol. 1, 63572H.1-63572H.6Conference Paper
Reconfigurable computing for tool-path computationJIMENO, A; CUENCA, S.International journal, advanced manufacturing technology. 2003, Vol 21, Num 12, pp 945-951, issn 0268-3768, 7 p.Article
A design of ABC95 array computer multi-function interconnection ChipsJI ZHENZHOU; ZHANG HONGTAO; FANG BINXING et al.High technology letters. 2002, Vol 8, Num 1, pp 12-16, issn 1006-6748Article
Revisiting the Itoh-Tsujii Inversion Algorithm for FPGA PlatformsREBEIRO, Chester; SUJOY SINHA ROY; SANKARA REDDY, D et al.IEEE transactions on very large scale integration (VLSI) systems. 2011, Vol 19, Num 8, pp 1508-1512, issn 1063-8210, 5 p.Article
An overview of power analysis attacks against field programmable gate arraysSTANDAERT, Francois-Xavier; PEETERS, Eric; ROUVROY, Gael et al.Proceedings of the IEEE. 2006, Vol 94, Num 2, pp 383-394, issn 0018-9219, 12 p.Article
Cost-Efficient SHA Hardware AcceleratorsCHAVES, Ricardo; KUZMANOV, Georgi; SOUSA, Leonel et al.IEEE transactions on very large scale integration (VLSI) systems. 2008, Vol 16, Num 8, pp 999-1008, issn 1063-8210, 10 p.Article
Application-dependent testing of FPGAsTAHOORI, Mehdi.IEEE transactions on very large scale integration (VLSI) systems. 2006, Vol 14, Num 9, pp 1024-1033, issn 1063-8210, 10 p.Article
12th annual IEEE symposium on field-programmable custom computing machines (Napa CA, 20-23 April 2004)Annual IEEE symposium on field-programmable custom computing machines. 2004, isbn 0-7695-2230-0, 1Vol, X-346 p, isbn 0-7695-2230-0Conference Proceedings
FPGA Programming for the MassesBACON, David F; RABBAH, Rodric; SHUKLA, Sunil et al.Communications of the ACM. 2013, Vol 56, Num 4, pp 56-63, issn 0001-0782, 8 p.Article
Implantation et optimisation des primitives cryptographiques = Implementation and Optimization of Cryptographic PrimitivesPornin, Thomas; Stern, Jacques.2001, 137 p.Thesis
A transmutable telecom systemMIYAZAKI, T; SHIRAKAWA, K; KATAYAMA, M et al.Lecture notes in computer science. 1998, pp 366-375, issn 0302-9743, isbn 3-540-64948-4Conference Paper
Accelerating DTP with reconfigurable computing enginesMACVICAR, D; SINGH, S.Lecture notes in computer science. 1998, pp 391-395, issn 0302-9743, isbn 3-540-64948-4Conference Paper
High-performance software protection using reconfigurable architecturesZAMBRENO, Joseph; HONBO, Dan; CHOUDHARY, Alok et al.Proceedings of the IEEE. 2006, Vol 94, Num 2, pp 419-431, issn 0018-9219, 13 p.Article
Software for development and communication with FPGA based hardwareSZEWINSKI, Jaroslaw; KALETA, Pawel; FAFARA, Przemyslaw et al.Proceedings of SPIE, the International Society for Optical Engineering. 2005, pp 59480H.1-59480H.8, issn 0277-786X, isbn 0-8194-5955-0, 2VolConference Paper
Embedded EMD Algorithm within an FPGA-based Design to Classify Nonlinear SDOF SystemsJONES, Jonathan D; PEI, Jin-Song; WRIGHT, Joseph P et al.Proceedings of SPIE, the International Society for Optical Engineering. 2010, Vol 7647, issn 0277-786X, isbn 978-0-8194-8062-0 0-8194-8062-2, 76470E.1-76470E.6, 2Conference Paper
Infrared-based Object TrackingGERVAIS, Jonathan; YOUNGBLOOD, Austin; DELASHMIT, Walter H et al.Proceedings of SPIE, the International Society for Optical Engineering. 2009, Vol 7298, issn 0277-786X, isbn 978-0-8194-7564-0 0-8194-7564-5, 72983V.1-72983V.9, 2Conference Paper
DOOCS patterns, reusable software components for FPGA based RF GUN field controllerPUCYK, Piotr.Proceedings of SPIE, the International Society for Optical Engineering. 2006, issn 0277-786X, isbn 0-8194-6431-7, vol1, 63470A.1-63470A.9Conference Paper
Special-purpose hardware for real-time compensation of atmospheric effects in long-range imagingORTIZ, Fernando E; CARRANO, Carmen J; KELMELIS, Eric J et al.Proceedings of SPIE, the International Society for Optical Engineering. 2006, pp 63030A.1-63030A.10, issn 0277-786X, isbn 0-8194-6382-5Conference Paper
Hardware implementation of N-LUT method using Field Programmable Gate Array technologyKWON, Do-Woo; KIM, Seung-Cheol; KIM, Eun-Soo et al.Proceedings of SPIE, the International Society for Optical Engineering. 2011, Vol 7957, issn 0277-786X, isbn 978-0-8194-8494-9, 1Vol, 79571C.1-79571C.8Conference Paper