2004 International Conference on Dependable Systems and Networks (28 June-1 July, 2004, Florence, Italy)International Conference on Dependable Systems and Networks. 2004, isbn 0-7695-2052-9, 1Vol, XXIX-909 p, isbn 0-7695-2052-9Conference Proceedings

19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (10-13 October, 2004, Cannes, France)IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, isbn 0-7695-2241-6, 1Vol, XII-506 p, isbn 0-7695-2241-6Conference Proceedings

Concurrent error detection in sequential circuits implemented using embedded memory of LUT-based FPGAsKRASNIEWSKI, Andrzej.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 487-495, isbn 0-7695-2241-6, 1Vol, 9 p.Conference Paper

Victim gate crosstalk fault modelFAVALLI, M.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 191-199, isbn 0-7695-2241-6, 1Vol, 9 p.Conference Paper

A new approach to linear connections building BIST structure based on CSTP structureGOSCINIAK, Ireneusz.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 256-263, isbn 0-7695-2241-6, 1Vol, 8 p.Conference Paper

On Failure Dependent Protection in Optical Grooming NetworksRAMASUBRAMANIAN, Srinivasan.International Conference on Dependable Systems and Networks. 2004, pp 475-484, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

Annotated bit flip fault modelFAVALLI, M.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 366-376, isbn 0-7695-2241-6, 1Vol, 11 p.Conference Paper

Fault diagnosis of analog circuits by operation-region model and X-Y zoning methodMIURA, Yukiya.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 230-238, isbn 0-7695-2241-6, 1Vol, 9 p.Conference Paper

A highly fault tolerant PLA architecture for failure-prone nanometer CMOS and novel quantum device technologiesSCHMID, Alexandre; LEBLEBICI, Yusuf.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 39-47, isbn 0-7695-2241-6, 1Vol, 9 p.Conference Paper

Arithmetic operators robust to multiple simultaneous upsetsLISBOA, C. A. L; CARRO, L.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 289-297, isbn 0-7695-2241-6, 1Vol, 9 p.Conference Paper

Toggle-masking for test-per-scan VLSI circuitsPARIMI, Nitin; XIAOLING SUN.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 332-338, isbn 0-7695-2241-6, 1Vol, 7 p.Conference Paper

A Framework for Evaluating Storage System DependabilityKEETON, Kimberly; MERCHANT, Arif.International Conference on Dependable Systems and Networks. 2004, pp 877-886, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

A Practical Analysis of Low-Density Parity-Check Erasure Codes for Wide-Area Storage ApplicationsPLANK, James S; THOMASON, Michael G.International Conference on Dependable Systems and Networks. 2004, pp 115-124, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

Cheap PaxosLAMPORT, Leslie; MASSA, Mike.International Conference on Dependable Systems and Networks. 2004, pp 307-314, isbn 0-7695-2052-9, 1Vol, 8 p.Conference Paper

Component Middleware to Support Non-repudiable Service InteractionsCOOK, Nick; ROBINSON, Paul; SHRIVASTAVA, Santosh et al.International Conference on Dependable Systems and Networks. 2004, pp 605-614, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

Does Your Result Checker Really Check?LAN GUO; MUKHOPADHYAY, Supratik; CUKIC, Bojan et al.International Conference on Dependable Systems and Networks. 2004, pp 399-404, isbn 0-7695-2052-9, 1Vol, 6 p.Conference Paper

Evaluating the Impact of Limited Resource on the Performance of Flooding in Wireless Sensor NetworksDOWNEY, Patrick; CARDELL-OLIVER, Rachel.International Conference on Dependable Systems and Networks. 2004, pp 785-794, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

Exposing and Eliminating Vulnerabilities to Denial of Service Attacks in Secure Gossip-Based MulticastBADISHI, Gal; KEIDAR, Idit; SASSON, Amir et al.International Conference on Dependable Systems and Networks. 2004, pp 223-232, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

Hierarchical Computation of Interval Availability and Related MetricsDONG TANG; TRIVEDI, Kishor S.International Conference on Dependable Systems and Networks. 2004, pp 693-698, isbn 0-7695-2052-9, 1Vol, 6 p.Conference Paper

High Throughput Byzantine Fault ToleranceKOTLA, Ramakrishna; DAHLIN, Mike.International Conference on Dependable Systems and Networks. 2004, pp 575-584, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

Timed Uniform Consensus Resilient to Crash and Timing FaultsIZUMI, Taisuke; SAITOH, Akinori; MASUZAWA, Toshimitsu et al.International Conference on Dependable Systems and Networks. 2004, pp 243-252, isbn 0-7695-2052-9, 1Vol, 10 p.Conference Paper

Learning based on fault injection and weight restriction for fault-tolerant hopfield neural networksKAMIURA, Naotake; ISOKAWA, Teijiro; MATSUI, Nobuyuki et al.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 339-346, isbn 0-7695-2241-6, 1Vol, 8 p.Conference Paper

Reliability and yield : a joint defect-oriented approachBARSKY, Roman; WAGNER, Israel A.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 2-10, isbn 0-7695-2241-6, 1Vol, 9 p.Conference Paper

Robust low-cost analog signal acquisition with self-test capabilitiesDE SOUZA, Adao A; CARRO, Luigi.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 239-247, isbn 0-7695-2241-6, 1Vol, 9 p.Conference Paper

System-level dependability analysis with RT-level fault injection accuracyLEVEUGLE, R; CIMONNET, D; AMMARI, A et al.IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2004, pp 451-458, isbn 0-7695-2241-6, 1Vol, 8 p.Conference Paper